6 resultados para Bus terminals

em Instituto Politécnico do Porto, Portugal


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The use of multicores is becoming widespread inthe field of embedded systems, many of which have real-time requirements. Hence, ensuring that real-time applications meet their timing constraints is a pre-requisite before deploying them on these systems. This necessitates the consideration of the impact of the contention due to shared lowlevel hardware resources like the front-side bus (FSB) on the Worst-CaseExecution Time (WCET) of the tasks. Towards this aim, this paper proposes a method to determine an upper bound on the number of bus requests that tasks executing on a core can generate in a given time interval. We show that our method yields tighter upper bounds in comparison with the state of-the-art. We then apply our method to compute the extra contention delay incurred by tasks, when they are co-scheduled on different cores and access the shared main memory, using a shared bus, access to which is granted using a round-robin arbitration (RR) protocol.

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The usage of COTS-based multicores is becoming widespread in the field of embedded systems. Providing realtime guarantees at design-time is a pre-requisite to deploy real-time systems on these multicores. This necessitates the consideration of the impact of the contention due to shared low-level hardware resources on the Worst-Case Execution Time (WCET) of the tasks. As a step towards this aim, this paper first identifies the different factors that make the WCET analysis a challenging problem in a typical COTS-based multicore system. Then, we propose and prove, a mathematically correct method to determine tight upper bounds on the WCET of the tasks, when they are co-scheduled on different cores.

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The current industry trend is towards using Commercially available Off-The-Shelf (COTS) based multicores for developing real time embedded systems, as opposed to the usage of custom-made hardware. In typical implementation of such COTS-based multicores, multiple cores access the main memory via a shared bus. This often leads to contention on this shared channel, which results in an increase of the response time of the tasks. Analyzing this increased response time, considering the contention on the shared bus, is challenging on COTS-based systems mainly because bus arbitration protocols are often undocumented and the exact instants at which the shared bus is accessed by tasks are not explicitly controlled by the operating system scheduler; they are instead a result of cache misses. This paper makes three contributions towards analyzing tasks scheduled on COTS-based multicores. Firstly, we describe a method to model the memory access patterns of a task. Secondly, we apply this model to analyze the worst case response time for a set of tasks. Although the required parameters to obtain the request profile can be obtained by static analysis, we provide an alternative method to experimentally obtain them by using performance monitoring counters (PMCs). We also compare our work against an existing approach and show that our approach outperforms it by providing tighter upper-bound on the number of bus requests generated by a task.

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Contention on the memory bus in COTS based multicore systems is becoming a major determining factor of the execution time of a task. Analyzing this extra execution time is non-trivial because (i) bus arbitration protocols in such systems are often undocumented and (ii) the times when the memory bus is requested to be used are not explicitly controlled by the operating system scheduler; they are instead a result of cache misses. We present a method for finding an upper bound on the extra execution time of a task due to contention on the memory bus in COTS based multicore systems. This method makes no assumptions on the bus arbitration protocol (other than assuming that it is work-conserving).

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In a liberalized electricity market, the Transmission System Operator (TSO) plays a crucial role in power system operation. Among many other tasks, TSO detects congestion situations and allocates the payments of electricity transmission. This paper presents a software tool for congestion management and transmission price determination in electricity markets. The congestion management is based on a reformulated Optimal Power Flow (OPF), whose main goal is to obtain a feasible solution for the re-dispatch minimizing the changes in the dispatch proposed by the market operator. The transmission price computation considers the physical impact caused by the market agents in the transmission network. The final tariff includes existing system costs and also costs due to the initial congestion situation and losses costs. The paper includes a case study for the IEEE 30 bus power system.

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Power systems have been suffering huge changes mainly due to the substantial increase of distributed generation and to the operation in competitive environments. Virtual power players can aggregate a diversity of players, namely generators and consumers, and a diversity of energy resources, including electricity generation based on several technologies, storage and demand response. Resource management gains an increasing relevance in this competitive context, while demand side active role provides managers with increased demand elasticity. This makes demand response use more interesting and flexible, giving rise to a wide range of new opportunities.This paper proposes a methodology for managing demand response programs in the scope of virtual power players. The proposed method is based on the calculation of locational marginal prices (LMP). The evaluation of the impact of using demand response specific programs on the LMP value supports the manager decision concerning demand response use. The proposed method has been computationally implemented and its application is illustrated in this paper using a 32 bus network with intensive use of distributed generation.