Board-level prototype validation: a built-in controller and extended BST architecture

Prototype validation is a major concern in modern electronic product design and development. Simulation, structural test, functional and timing debug are all forming parts of the validation process, although very often addressed as dissociated tasks. In this paper we describe an integrated approach to board-level prototype validation, based on a set of mandatory/optional BST instructions and a built-in controller for debug and test, that addresses the late mentioned tasks as inherent parts of a whole process

Using remote labs to serve different teacher's needs a case study with VISIR and RemotElectLab

Remote Laboratories are an emergent technological and pedagogical tool at all education levels, and their widespread use is an important part of their own improvement and evolution. This paper describes several issues encountered on laboratorial classes, on higher education courses, when using remote laboratories based on PXI systems, either using the VISIR system or an alternate in-house solution. Three main issues are presented and explained, all reported by teachers that gave support to students use of remote laboratories. The first issue deals with the need to allow students to select the actual place where an ammeter is to be inserted on electric circuits, even incorrectly, therefore emulating real world difficulties. The second one deals with problems with timing when several measurements are required at short intervals, as in the discharge cycle of a capacitor. And the last issue deals with the use of a multimeter in DC mode when reading AC values, a use that collides with the lab settings. All scenarios are presented and discussed including the solution found for each case. The conclusion derived from the described work is that the remote laboratories area is an expanding field, where practical use leads to improvement and evolution of the available solutions, requiring a strict cooperation and information sharing between all actors, i.e. developers, teachers and students.

Real Time Internet DGPS Service

The accuracy of the Navigation Satellite Timing and Ranging (NAVSTAR) Global Positioning System (GPS) measurements is insufficient for many outdoor navigation tasks. As a result, in the late nineties, a new methodology – the Differential GPS (DGPS) – was developed. The differential approach is based on the calculation and dissemination of the range errors of the GPS satellites received. GPS/DGPS receivers correlate the broadcasted GPS data with the DGPS corrections, granting users increased accuracy. DGPS data can be disseminated using terrestrial radio beacons, satellites and, more recently, the Internet. Our goal is to provide mobile platforms within our campus with DGPS data for precise outdoor navigation. To achieve this objective, we designed and implemented a three-tier client/server distributed system that establishes Internet links with remote DGPS sources and performs campus-wide dissemination of the obtained data. The Internet links are established between data servers connected to remote DGPS sources and the client, which is the data input module of the campus-wide DGPS data provider. The campus DGPS data provider allows the establishment of both Intranet and wireless links within the campus. This distributed system is expected to provide adequate support for accurate (submetric) outdoor navigation tasks.

Implementation of a Campus wide DGPS Data Server

Although the Navigation Satellite Timing and Ranging (NAVSTAR) Global Positioning System (GPS) is, de facto, the standard positioning system used in outdoor navigation, it does not provide, per se, all the features required to perform many outdoor navigational tasks. The accuracy of the GPS measurements is the most critical issue. The quest for higher position readings accuracy led to the development, in the late nineties, of the Differential Global Positioning System (DGPS). The differential GPS method detects the range errors of the GPS satellites received and broadcasts them. The DGPS/GPS receivers correlate the DGPS data with the GPS satellite data they are receiving, granting users increased accuracy. DGPS data is broadcasted using terrestrial radio beacons, satellites and, more recently, the Internet. Our goal is to have access, within the ISEP campus, to DGPS correction data. To achieve this objective we designed and implemented a distributed system composed of two main modules which are interconnected: a distributed application responsible for the establishment of the data link over the Internet between the remote DGPS stations and the campus, and the campus-wide DGPS data server application. The DGPS data Internet link is provided by a two-tier client/server distributed application where the server-side is connected to the DGPS station and the client-side is located at the campus. The second unit, the campus DGPS data server application, diffuses DGPS data received at the campus via the Intranet and via a wireless data link. The wireless broadcast is intended for DGPS/GPS portable receivers equipped with an air interface and the Intranet link is provided for DGPS/GPS receivers with just a RS232 DGPS data interface. While the DGPS data Internet link servers receive the DGPS data from the DGPS base stations and forward it to the DGPS data Internet link client, the DGPS data Internet link client outputs the received DGPS data to the campus DGPS data server application. The distributed system is expected to provide adequate support for accurate (sub-metric) outdoor campus navigation tasks. This paper describes in detail the overall distributed application.

An optimal boundary fair scheduling

Nowadays, many real-time operating systems discretize the time relying on a system time unit. To take this behavior into account, real-time scheduling algorithms must adopt a discrete-time model in which both timing requirements of tasks and their time allocations have to be integer multiples of the system time unit. That is, tasks cannot be executed for less than one time unit, which implies that they always have to achieve a minimum amount of work before they can be preempted. Assuming such a discrete-time model, the authors of Zhu et al. (Proceedings of the 24th IEEE international real-time systems symposium (RTSS 2003), 2003, J Parallel Distrib Comput 71(10):1411–1425, 2011) proposed an efficient “boundary fair” algorithm (named BF) and proved its optimality for the scheduling of periodic tasks while achieving full system utilization. However, BF cannot handle sporadic tasks due to their inherent irregular and unpredictable job release patterns. In this paper, we propose an optimal boundary-fair scheduling algorithm for sporadic tasks (named BF TeX ), which follows the same principle as BF by making scheduling decisions only at the job arrival times and (expected) task deadlines. This new algorithm was implemented in Linux and we show through experiments conducted upon a multicore machine that BF TeX outperforms the state-of-the-art discrete-time optimal scheduler (PD TeX ), benefiting from much less scheduling overheads. Furthermore, it appears from these experimental results that BF TeX is barely dependent on the length of the system time unit while PD TeX —the only other existing solution for the scheduling of sporadic tasks in discrete-time systems—sees its number of preemptions, migrations and the time spent to take scheduling decisions increasing linearly when improving the time resolution of the system.

Compositional multiprocessor scheduling: the GMPR interface

Composition is a practice of key importance in software engineering. When real-time applications are composed, it is necessary that their timing properties (such as meeting the deadlines) are guaranteed. The composition is performed by establishing an interface between the application and the physical platform. Such an interface typically contains information about the amount of computing capacity needed by the application. For multiprocessor platforms, the interface should also present information about the degree of parallelism. Several interface proposals have recently been put forward in various research works. However, those interfaces are either too complex to be handled or too pessimistic. In this paper we propose the generalized multiprocessor periodic resource model (GMPR) that is strictly superior to the MPR model without requiring a too detailed description. We then derive a method to compute the interface from the application specification. This method has been implemented in Matlab routines that are publicly available.

NoC contention analysis using a branch-and-prune algorithm

“Many-core” systems based on a Network-on-Chip (NoC) architecture offer various opportunities in terms of performance and computing capabilities, but at the same time they pose many challenges for the deployment of real-time systems, which must fulfill specific timing requirements at runtime. It is therefore essential to identify, at design time, the parameters that have an impact on the execution time of the tasks deployed on these systems and the upper bounds on the other key parameters. The focus of this work is to determine an upper bound on the traversal time of a packet when it is transmitted over the NoC infrastructure. Towards this aim, we first identify and explore some limitations in the existing recursive-calculus-based approaches to compute the Worst-Case Traversal Time (WCTT) of a packet. Then, we extend the existing model by integrating the characteristics of the tasks that generate the packets. For this extended model, we propose an algorithm called “Branch and Prune” (BP). Our proposed method provides tighter and safe estimates than the existing recursive-calculus-based approaches. Finally, we introduce a more general approach, namely “Branch, Prune and Collapse” (BPC) which offers a configurable parameter that provides a flexible trade-off between the computational complexity and the tightness of the computed estimate. The recursive-calculus methods and BP present two special cases of BPC when a trade-off parameter is 1 or ∞, respectively. Through simulations, we analyze this trade-off, reason about the implications of certain choices, and also provide some case studies to observe the impact of task parameters on the WCTT estimates.

Ajustes Posturais dos músculos da tibiotársica em indivíduos com Doença de Parkinson durante o sit-to-stand

Introdução: Os ajustes posturais antecipatórios (APAs) são essenciais para o movimento típico, estando alterados nas doenças neuro degenerativas como a doença de Parkinson (DP) Objectivo(s): Estudar os early postural adjustments e os APAs em indivíduos com DP durante o sentar para levantar (STS), com e sem dupla tarefa. Métodos: Foi recolhida a atividade eletromiográfica (EMG) dos músculos tibial anterior, solear e gastrocnémio medial, em indivíduos com e sem DP (9 em cada grupo), durante o STS. Este foi determinado pelo deslocamento antero posterior do centro de pressão através da plataforma de forças, sendo a tarefa cognitiva dada pelo stroop colour word interference test. Os ajustes posturais foram avaliados pelo tempo de ativação e pela atividade EMG relativa, bem como pela análise da co ativação agonista/antagonista. Resultados: Não foram encontradas diferenças estatisticamente significativas entre o grupo de controlo e o grupo com DP em nenhuma das variáveis analisadas Há uma tendência para o grupo com DP apresentar APAs mais cedo na tarefa simples, mantendo atividade muscular durante mais tempo e com maior atividade EMG relativa que o grupo controlo. Na dupla tarefa mantém-se essa tendência, exceto o tempo de ativação ser mais próximo do levante. Conclusão: Os défices posturais decorrentes da doença de Parkinson parecem não ser evidenciados na primeira fase do sit-to-stand.

Comportamento da tibiotársica na sequência de movimento de sentar para de pé em crianças prematuras

Introdução: A prematuridade constitui um fator de risco para a ocorrência de lesões ao nível do sistema nervoso central, sendo que uma idade gestacional inferior a 36 semanas potencia esse mesmo risco, nomeadamente para a paralisia cerebral (PC) do tipo diplegia espástica. A sequência de movimento de sentado para de pé (SPP), sendo uma das aprendizagens motoras que exige um controlo postural (CP) ao nível da tibiotársica, parece ser uma tarefa funcional frequentemente comprometida em crianças prematuras com e sem PC. Objetivo(s): Descrever o comportamento dos músculos da tibiotársica, tibial anterior (TA) e solear (SOL), no que diz respeito ao timing de ativação, magnitude e co-ativação muscular durante a fase I e início da fase II na sequência de movimento de SPP realizada por cinco crianças prematuras com PC do tipo diplegia espástica e cinco crianças prematuras sem diagnóstico de alteração neuromotoras, sendo as primeiras sujeitas a um programa de intervenção baseado nos princípios do conceito de Bobath – Tratamento do Neurodesenvolvimento (TND). Métodos: Foram avaliadas 10 crianças prematuras, cinco com PC e cinco sem diagnóstico de alterações neuromotoras, tendo-se recorrido à eletromiografia de superfície para registar parâmetros musculares, nomeadamente timings, magnitudes e valores de co-ativação dos músculos TA e SOL, associados à fase I e inico da fase II da sequência de movimento de SPP. Procedeu-se ao registo de imagem de modo a facilitar a avaliação dos componentes de movimento associados a esta tarefa. Estes procedimentos foram realizados num único momento, no caso das crianças sem diagnóstico de alterações neuromotoras e em dois momentos, antes e após a aplicação de um programa de intervenção segundo o Conceito de Bobath – TND no caso das crianças com PC. A estas foi ainda aplicado o Teste da Medida das Funções Motoras (TMFM–88) e a Classificação Internacional da Funcionalidade Incapacidade e Saúde – crianças e jovens (CIF-CJ). Resultados: Através da eletromiografia constatou-se que ambos os grupos apresentaram timings de ativação afastados da janela temporal considerada como ajustes posturais antecipatórios (APAs), níveis elevados de co-ativação, em alguns casos com inversão na ordem de recrutamento muscular o que foi possível modificar nas crianças com PC após o período de intervenção. Nestas, verificou-se ainda que, a sequência de movimento de SPP foi realizada com menor número de compensações e com melhor relação entre estruturas proximais e distais compatível com o aumento do score final do TMFM-88 e modificação positiva nos itens de atividade e participação da CIF-CJ. Conclusão: As crianças prematuras com e sem PC apresentaram alterações no CP da tibiotársica e níveis elevados de co-ativação muscular. Após o período de intervenção as crianças com PC apresentaram modificações positivas no timing e co-ativação muscular, com impacto funcional evidenciado no aumento do score final da TMFM-88 e modificações positivas na CIF-CJ.

Avaliação dos ajustes posturais em indivíduos com instabilidade funcional do tornozelo

Introdução:O Controlo Postural é um processo neural complexo envolvido na organização da estabilidade e orientação da posição do corpo no espaço. A Instabilidade Funcional (IF) do tornozelo é descrita como uma perceção subjetiva de instabilidade articular, que afeta o controlo postural. Apesar de vários estudos terem investigado os fatores inerentes à IF ainda existe inconsistência nos resultados da literatura sobre os mecanismos envolvidos nesta. Objetivo (s):avaliar os ajustes posturais envolvidos na resposta a uma perturbação externa realizada de forma previsível e imprevisível em indivíduos com IF. Métodos:Estudo observacional analítico transversal, teve uma amostra de 20 indivíduos, que foram divididos em grupo com IF e grupo de controlo. Foi recolhida atividade eletromiográfica bilateral dos músculos longo e curto peroneal (PL e PC), tibial anterior (TA) e solear (SOL) associado a uma perturbação externa aplicada de forma previsível e imprevisível. Os ajustes posturais foram avaliados através da análise do início da atividade muscular, da magnitude global dos ajustes posturais compensatórios e antecipatórios e magnitude das respostas de curta e média latência Resultados: Na perturbação imprevisível não se verificaram diferenças significativas no início da atividade muscular (p>0,05). Enquanto na magnitude das respostas de curta e média latência verificou-se diferenças nos músculos TA (Ia,p=0,000; II, p=0,011), CP (Ia,p=0,029; II, p=0,001) e LP (Ia, p=0,030) entre o membro com IF e o controlo e no LP (II, p=0,011) entre o membro sem IF do grupo com IF e o controlo. Na perturbação previsível observaram-se diferenças nos ajustes posturais antecipatórios (APA) dos músculos TA (p=0,006) e LP (p=0,020) entre o membro sem IF do grupo com IF e o controlo. Conclusão: Os indivíduos com IF apresentam défices na magnitude das respostas de média e curta latência numa perturbação imprevisível e nos APA na perturbação previsível.

Deteção e previsão de falhas em equipamentos de produção industrial

As empresas nacionais deparam-se com a necessidade de responder ao mercado com uma grande variedade de produtos, pequenas séries e prazos de entrega reduzidos. A competitividade das empresas num mercado global depende assim da sua eficiência, da sua flexibilidade, da qualidade dos seus produtos e de custos reduzidos. Para se atingirem estes objetivos é necessário desenvolverem-se estratégias e planos de ação que envolvem os equipamentos produtivos, incluindo: a criação de novos equipamentos complexos e mais fiáveis, alteração dos equipamentos existentes modernizando-os de forma a responderem às necessidades atuais e a aumentar a sua disponibilidade e produtividade; e implementação de políticas de manutenção mais assertiva e focada no objetivo de “zero avarias”, como é o caso da manutenção preditiva. Neste contexto, o objetivo principal deste trabalho consiste na previsão do instante temporal ótimo da manutenção de um equipamento industrial – um refinador da fábrica de Mangualde da empresa Sonae Industria, que se encontra em funcionamento contínuo 24 horas por dia, 365 dias por ano. Para o efeito são utilizadas medidas de sensores que monitorizam continuamente o estado do refinador. A principal operação de manutenção deste equipamento é a substituição de dois discos metálicos do seu principal componente – o desfibrador. Consequentemente, o sensor do refinador analisado com maior detalhe é o sensor que mede a distância entre os dois discos do desfibrador. Os modelos ARIMA consistem numa abordagem estatística avançada para previsão de séries temporais. Baseados na descrição da autocorrelação dos dados, estes modelos descrevem uma série temporal como função dos seus valores passados. Neste trabalho, a metodologia ARIMA é utilizada para determinar um modelo que efetua uma previsão dos valores futuros do sensor que mede a distância entre os dois discos do desfibrador, determinando-se assim o momento ótimo da sua substituição e evitando paragens forçadas de produção por ocorrência de uma falha por desgaste dos discos. Os resultados obtidos neste trabalho constituem uma contribuição científica importante para a área da manutenção preditiva e deteção de falhas em equipamentos industriais.

Real-Time Application Mapping for Many-Cores Using a Limited Migrative Model

Many-core platforms are an emerging technology in the real-time embedded domain. These devices offer various options for power savings, cost reductions and contribute to the overall system flexibility, however, issues such as unpredictability, scalability and analysis pessimism are serious challenges to their integration into the aforementioned area. The focus of this work is on many-core platforms using a limited migrative model (LMM). LMM is an approach based on the fundamental concepts of the multi-kernel paradigm, which is a promising step towards scalable and predictable many-cores. In this work, we formulate the problem of real-time application mapping on a many-core platform using LMM, and propose a three-stage method to solve it. An extended version of the existing analysis is used to assure that derived mappings (i) guarantee the fulfilment of timing constraints posed on worst-case communication delays of individual applications, and (ii) provide an environment to perform load balancing for e.g. energy/thermal management, fault tolerance and/or performance reasons.

An Enhanced WLAN Security System With FPGA Implementation for Multimedia Applications

Maintaining a high level of data security with a low impact on system performance is more challenging in wireless multimedia applications. Protocols that are used for wireless local area network (WLAN) security are known to significantly degrade performance. In this paper, we propose an enhanced security system for a WLAN. Our new design aims to decrease the processing delay and increase both the speed and throughput of the system, thereby making it more efficient for multimedia applications. Our design is based on the idea of offloading computationally intensive encryption and authentication services to the end systems’ CPUs. The security operations are performed by the hosts’ central processor (which is usually a powerful processor) before delivering the data to a wireless card (which usually has a low-performance processor). By adopting this design, we show that both the delay and the jitter are significantly reduced. At the access point, we improve the performance of network processing hardware for real-time cryptographic processing by using a specialized processor implemented with field-programmable gate array technology. Furthermore, we use enhanced techniques to implement the Counter (CTR) Mode with Cipher Block Chaining Message Authentication Code Protocol (CCMP) and the CTR protocol. Our experiments show that it requires timing in the range of 20–40 μs to perform data encryption and authentication on different end-host CPUs (e.g., Intel Core i5, i7, and AMD 6-Core) as compared with 10–50 ms when performed using the wireless card. Furthermore, when compared with the standard WiFi protected access II (WPA2), results show that our proposed security system improved the speed to up to 3.7 times.

A framework for memory contention analysis in multi-core platforms

The last decade has witnessed a major shift towards the deployment of embedded applications on multi-core platforms. However, real-time applications have not been able to fully benefit from this transition, as the computational gains offered by multi-cores are often offset by performance degradation due to shared resources, such as main memory. To efficiently use multi-core platforms for real-time systems, it is hence essential to tightly bound the interference when accessing shared resources. Although there has been much recent work in this area, a remaining key problem is to address the diversity of memory arbiters in the analysis to make it applicable to a wide range of systems. This work handles diverse arbiters by proposing a general framework to compute the maximum interference caused by the shared memory bus and its impact on the execution time of the tasks running on the cores, considering different bus arbiters. Our novel approach clearly demarcates the arbiter-dependent and independent stages in the analysis of these upper bounds. The arbiter-dependent phase takes the arbiter and the task memory-traffic pattern as inputs and produces a model of the availability of the bus to a given task. Then, based on the availability of the bus, the arbiter-independent phase determines the worst-case request-release scenario that maximizes the interference experienced by the tasks due to the contention for the bus. We show that the framework addresses the diversity problem by applying it to a memory bus shared by a fixed-priority arbiter, a time-division multiplexing (TDM) arbiter, and an unspecified work-conserving arbiter using applications from the MediaBench test suite. We also experimentally evaluate the quality of the analysis by comparison with a state-of-the-art TDM analysis approach and consistently showing a considerable reduction in maximum interference.

Response Time Analysis of Slotted WiDOM in Noisy Wireless Channels

International Conference on Emerging Technologies and Factory Automation (ETFA 2015), Industrial Communication Technologies and Systems, Luxembourg, Luxembourg.