Accounting logic and new professional in healthcare: a case study

The central place hospitals occupy in health systems transforms them into prime target of healthcare reforms. This study aims to identify current trends in organizational structure change in public hospitals and explore the role of accounting in attempts to develop controls over professionals within public hospitals. The analytical framework we proposed crosses the concept of “new professionalism” (Evetts, 2010), with the concept of “accounting logic” for controlling professionals (Broadbent and Laughlin, 1995). Looking for a more holistic overview, we developed a qualitative and exploratory study. The data were collected trough semi-structured interviews with doctors of a clinical hospital unit. Content analysis suggests that, although we cannot say that there is a complete and generalized integration of accounting information in the clinical decisions, important improvement has been made in that area. Despite the extensive literature developed on this topic, there is any empirical studies of authors are aware that allow us to realize how real doctors in reals day-to-day work integrated these trends of change in theirs clinical decisions.

Controlador Boundary-Scan

A crescente complexidade dos sistemas electrónicos associada a um desenvolvimento nas tecnologias de encapsulamento levou à miniaturização dos circuitos integrados, provocando dificuldades e limitações no diagnóstico e detecção de falhas, diminuindo drasticamente a aplicabilidade dos equipamentos ICT. Como forma de lidar com este problema surgiu a infra-estrutura Boundary Scan descrita na norma IEEE1149.1 “Test Access Port and Boundary-Scan Architecture”, aprovada em 1990. Sendo esta solução tecnicamente viável e interessante economicamente para o diagnóstico de defeitos, efectua também outras aplicações. O SVF surgiu do desejo de incutir e fazer com que os fornecedores independentes incluíssem a norma IEEE 1149.1, é desenvolvido num formato ASCII, com o objectivo de enviar sinais, aguardar pela sua resposta, segundo a máscara de dados baseada na norma IEEE1149.1. Actualmente a incorporação do Boundary Scan nos circuitos integrados está em grande expansão e consequentemente usufrui de uma forte implementação no mercado. Neste contexto o objectivo da dissertação é o desenvolvimento de um controlador boundary scan que implemente uma interface com o PC e possibilite o controlo e monitorização da aplicação de teste ao PCB. A arquitectura do controlador desenvolvido contém um módulo de Memória de entrada, um Controlador TAP e uma Memória de saída. A implementação do controlador foi feita através da utilização de uma FPGA, é um dispositivo lógico reconfiguráveis constituído por blocos lógicos e por uma rede de interligações, ambos configuráveis, que permitem ao utilizador implementar as mais variadas funções digitais. A utilização de uma FPGA tem a vantagem de permitir a versatilidade do controlador, facilidade na alteração do seu código e possibilidade de inserir mais controladores dentro da FPGA. Foi desenvolvido o protocolo de comunicação e sincronização entre os vários módulos, permitindo o controlo e monitorização dos estímulos enviados e recebidos ao PCB, executados automaticamente através do software do Controlador TAP e de acordo com a norma IEEE 1149.1. A solução proposta foi validada por simulação utilizando o simulador da Xilinx. Foram analisados todos os sinais que constituem o controlador e verificado o correcto funcionamento de todos os seus módulos. Esta solução executa todas as sequências pretendidas e necessárias (envio de estímulos) à realização dos testes ao PCB. Recebe e armazena os dados obtidos, enviando-os posteriormente para a memória de saída. A execução do trabalho permitiu concluir que os projectos de componentes electrónicos tenderão a ser descritos num nível de abstracção mais elevado, recorrendo cada vez mais ao uso de linguagens de hardware, no qual o VHDL é uma excelente ferramenta de programação. O controlador desenvolvido será uma ferramenta bastante útil e versátil para o teste de PCBs e outras funcionalidades disponibilizadas pelas infra-estruturas BS.

A multiresidue method for the analysis of carbamate and urea pesticides from soils by microwave-assisted extraction and liquid chromatography with photodiode array detection

A multiresidue approach using microwave-assisted extraction and liquid chromatography with photodiode array detection was investigated for the determination of butylate, carbaryl, carbofuran, chlorpropham, ethiofencarb, linuron,metobromuron, and monolinuron in soils. The critical parameters of the developed methodology were studied. Method validation was performed by analyzing freshly and aged spiked soil samples. The recoveries and relative standard deviations reached using the optimized conditions were between 77.0 ± 0.46% and 120 ± 2.9% except for ethiofencarb (46.4 ± 4.4% to 105 ± 1.6%) and butylate (22.1 ± 7.6% to 49.2 ± 11%). Soil samples from five locations of Portugal were analysed.

Screening of grapes and wine for azoxystrobin, kresoxim-methyl and trifloxystrobin fungicides by HPLC with diode array detection

The Quinone outside Inhibitors (QoI) are one of the most important and recent fungicide groups used in viticulture and also allowed by Integrated Pest Management. Azoxystrobin, kresoxim-methyl and trifloxystrobin are the main active ingredients for treating downy and powdery mildews that can be present in grapes and wines. In this paper, a method is reported for the analysis of these three QoI-fungicides in grapes and wine. After liquid–liquid extraction and a clean-up on commercial silica cartridges, analysis was by isocratic HPLC with diode array detection (DAD) with a run time of 13 min. Confirmation was by solid-phase micro-extraction (SPME), followed by GC/MS determination. The main validation parameters for the three compounds in grapes and wine were a limit of detection up to 0.073mg kg-1, a precision not exceeding 10.0% and an average recovery of 93% ±38.

Indoor location using fingerprinting and fuzzy logic

Indoor location systems cannot rely on technologies such as GPS (Global Positioning System) to determine the position of a mobile terminal, because its signals are blocked by obstacles such as walls, ceilings, roofs, etc. In such environments. The use of alternative techniques, such as the use of wireless networks, should be considered. The location estimation is made by measuring and analysing one of the parameters of the wireless signal, usually the received power. One of the techniques used to estimate the locations using wireless networks is fingerprinting. This technique comprises two phases: in the first phase data is collected from the scenario and stored in a database; the second phase consists in determining the location of the mobile node by comparing the data collected from the wireless transceiver with the data previously stored in the database. In this paper an approach for localisation using fingerprinting based on Fuzzy Logic and pattern searching is presented. The performance of the proposed approach is compared with the performance of classic methods, and it presents an improvement between 10.24% and 49.43%, depending on the mobile node and the Fuzzy Logic parameters.ł

Crossing genetic and swarm intelligence algorithms to generate logic circuits

Genetic Algorithms (GAs) are adaptive heuristic search algorithm based on the evolutionary ideas of natural selection and genetic. The basic concept of GAs is designed to simulate processes in natural system necessary for evolution, specifically those that follow the principles first laid down by Charles Darwin of survival of the fittest. On the other hand, Particle swarm optimization (PSO) is a population based stochastic optimization technique inspired by social behavior of bird flocking or fish schooling. PSO shares many similarities with evolutionary computation techniques such as GAs. The system is initialized with a population of random solutions and searches for optima by updating generations. However, unlike GA, PSO has no evolution operators such as crossover and mutation. In PSO, the potential solutions, called particles, fly through the problem space by following the current optimum particles. PSO is attractive because there are few parameters to adjust. This paper presents hybridization between a GA algorithm and a PSO algorithm (crossing the two algorithms). The resulting algorithm is applied to the synthesis of combinational logic circuits. With this combination is possible to take advantage of the best features of each particular algorithm.

Reliability and availability in reconfigurable computing: a basis for a common solution

Dynamically reconfigurable SRAM-based field-programmable gate arrays (FPGAs) enable the implementation of reconfigurable computing systems where several applications may be run simultaneously, sharing the available resources according to their own immediate functional requirements. To exclude malfunctioning due to faulty elements, the reliability of all FPGA resources must be guaranteed. Since resource allocation takes place asynchronously, an online structural test scheme is the only way of ensuring reliable system operation. On the other hand, this test scheme should not disturb the operation of the circuit, otherwise availability would be compromised. System performance is also influenced by the efficiency of the management strategies that must be able to dynamically allocate enough resources when requested by each application. As those resources are allocated and later released, many small free resource blocks are created, which are left unused due to performance and routing restrictions. To avoid wasting logic resources, the FPGA logic space must be defragmented regularly. This paper presents a non-intrusive active replication procedure that supports the proposed test methodology and the implementation of defragmentation strategies, assuring both the availability of resources and their perfect working condition, without disturbing system operation.

Implementação de um Array de detetores de radiação ionizante

Atualmente, as radiações ionizantes desempenham um papel fundamental nas áreas de diagnóstico e terapia, estando omnipresentes em ambientes hospitalares. Contudo, devido aos efeitos biológicos adversos da radiação, torna-se essencial a protecção dos profissionais de saúde e pacientes. Consequentemente, um array de detetores capazes de produzir um sinal acústico, aquando da presença de radiação ionizante excedendo determinados valores limite e transmissão via wireless das leituras para um sistema central _e de grande interesse prático. Nesta dissertação, foi implementado um sistema capaz de alimentar um array de sensores de radiação para monitorização de diferentes espaços e transmissão das leituras efetuadas via wireless. A aquisição de dados foi realizada, recorrendo à utilização de um conversor analógico-digital. Vários testes de validação foram realizados, através de vários passos para alcançar a concretização do sistema final, nomeadamente testes relativos ao circuito de detecção, módulos de comunicação wireless, bem como o uso de diferentes ambientes de desenvolvimento integrados (IDE). Os resultados destes testes mostram a visualização e gravação adequadas dos dados relativos aos níveis de radiação, bem como a transmissão de dados de forma viável, permitindo a monitorização de espaços sujeitos à presença de radiação ionizante. Desta forma, um array de contadores Geiger-Müller, ligados a módulos wireless XBee open-source e uma placa Arduino, possibilitou a implementação de um sistema viável e de baixo custo para monitorização de radiação ionizante e registar esses mesmos dados para posterior análise.

Run-time defragmentation for dynamically reconfigurable hardware

Reconfigurable computing experienced a considerable expansion in the last few years, due in part to the fast run-time partial reconfiguration features offered by recent SRAM-based Field Programmable Gate Arrays (FPGAs), which allowed the implementation in real-time of dynamic resource allocation strategies, with multiple independent functions from different applications sharing the same logic resources in the space and temporal domains. However, when the sequence of reconfigurations to be performed is not predictable, the efficient management of the logic space available becomes the greatest challenge posed to these systems. Resource allocation decisions have to be made concurrently with system operation, taking into account function priorities and optimizing the space currently available. As a consequence of the unpredictability of this allocation procedure, the logic space becomes fragmented, with many small areas of free resources failing to satisfy most requests and so remaining unused. A rearrangement of the currently running functions is therefore necessary, so as to obtain enough contiguous space to implement incoming functions, avoiding the spreading of their components and the resulting degradation of system performance. A novel active relocation procedure for Configurable Logic Blocks (CLBs) is herein presented, able to carry out online rearrangements, defragmenting the available FPGA resources without disturbing functions currently running.

Logic-based schedulability analysis for compositional hard real-time embedded systems

Over the past decades several approaches for schedulability analysis have been proposed for both uni-processor and multi-processor real-time systems. Although different techniques are employed, very little has been put forward in using formal specifications, with the consequent possibility for mis-interpretations or ambiguities in the problem statement. Using a logic based approach to schedulability analysis in the design of hard real-time systems eases the synthesis of correct-by-construction procedures for both static and dynamic verification processes. In this paper we propose a novel approach to schedulability analysis based on a timed temporal logic with time durations. Our approach subsumes classical methods for uni-processor scheduling analysis over compositional resource models by providing the developer with counter-examples, and by ruling out schedules that cause unsafe violations on the system. We also provide an example showing the effectiveness of our proposal.

Adaptive Penalty and Barrier function based on Fuzzy Logic

Optimization methods have been used in many areas of knowledge, such as Engineering, Statistics, Chemistry, among others, to solve optimization problems. In many cases it is not possible to use derivative methods, due to the characteristics of the problem to be solved and/or its constraints, for example if the involved functions are non-smooth and/or their derivatives are not know. To solve this type of problems a Java based API has been implemented, which includes only derivative-free optimization methods, and that can be used to solve both constrained and unconstrained problems. For solving constrained problems, the classic Penalty and Barrier functions were included in the API. In this paper a new approach to Penalty and Barrier functions, based on Fuzzy Logic, is proposed. Two penalty functions, that impose a progressive penalization to solutions that violate the constraints, are discussed. The implemented functions impose a low penalization when the violation of the constraints is low and a heavy penalty when the violation is high. Numerical results, obtained using twenty-eight test problems, comparing the proposed Fuzzy Logic based functions to six of the classic Penalty and Barrier functions are presented. Considering the achieved results, it can be concluded that the proposed penalty functions besides being very robust also have a very good performance.