Strap repair optimization by using embedded patches

Adhesively-bonded techniques offer an attractive option for repair of aluminium structures, and currently there are three widely used configurations, i.e., single-strap (SS), double-strap (DS) and scarf repairs. SS and DS repairs are straightforward to execute but stresses in the adhesive layer peak at the ends of the overlap. DS repairs additionally require both sides of the damaged structures to be reachable for repair, which is often not possible. In these repair configurations, some limitations emerge such as the weight, aerodynamic performance and aesthetics. The scarf repair is more complex to fabricate but stresses are more uniform along the adhesive bondline. Few studies of SS and DS repairs with embedded patches, such that these are completely flush with the adherends, are available in the literature. Furthermore, no data is available about the effects of geometrical and material parameters (e.g. the Young’s modulus of adhesive, E) on the mechanical behaviour optimization of embedded repairs. For this purpose, in this work standard SS and DD repairs, and also with embedded patches in the adherends, were tested under tension to allow the geometry optimization, by varying the overlap length (LO), thus allowing the maximization of the repairs strength. The influence of the patch embedding technique, showing notorious advantages such as aerodynamic or aesthetics, was compared in strength with standard strap repairs, for the viability analysis of its implementation. As a result of this work, some conclusions were drawn for the design optimization of bonded repairs on aluminium structures.

An embedded 1149.4 extension to support mixed-signal debugging

Debugging electronic circuits is traditionally done with bench equipment directly connected to the circuit under debug. In the digital domain, the difficulties associated with the direct physical access to circuit nodes led to the inclusion of resources providing support to that activity, first at the printed circuit level, and then at the integrated circuit level. The experience acquired with those solutions led to the emergence of dedicated infrastructures for debugging cores at the system-on-chip level. However, all these developments had a small impact in the analog and mixed-signal domain, where debugging still depends, to a large extent, on direct physical access to circuit nodes. As a consequence, when analog and mixed-signal circuits are integrated as cores inside a system-on-chip, the difficulties associated with debugging increase, which cause the time-to-market and the prototype verification costs to also increase. The present work considers the IEEE1149.4 infrastructure as a means to support the debugging of mixed-signal circuits, namely to access the circuit nodes and also an embedded debug mechanism named mixed-signal condition detector, necessary for watch-/breakpoints and real-time analysis operations. One of the main advantages associated with the proposed solution is the seamless migration to the system-on-chip level, as the access is done through electronic means, thus easing debugging operations at different hierarchical levels.

Optimizing the embedded heaters position in the pultrusion process using finite element analysis

This study is based on a previous experimental work in which embedded cylindrical heaters were applied to a pultrusion machine die, and resultant energetic performance compared with that achieved with the former heating system based on planar resistances. The previous work allowed to conclude that the use of embedded resistances enhances significantly the energetic performance of pultrusion process, leading to 57% decrease of energy consumption. However, the aforementioned study was developed with basis on an existing pultrusion die, which only allowed a single relative position for the heaters. In the present work, new relative positions for the heaters were investigated in order to optimize heat distribution process and energy consumption. Finite Elements Analysis was applied as an efficient tool to identify the best relative position of the heaters into the die, taking into account the usual parameters involved in the process and the control system already tested in the previous study. The analysis was firstly developed with basis on eight cylindrical heaters located in four different location plans. In a second phase, in order to refine the results, a new approach was adopted using sixteen heaters with the same total power. Final results allow to conclude that the correct positioning of the heaters can contribute to about 10% of energy consumption reduction, decreasing the production costs and leading to a better eco-efficiency of pultrusion process.

Efficient schedulability tests for real-time embedded systems with urgent routines

Task scheduling is one of the key mechanisms to ensure timeliness in embedded real-time systems. Such systems have often the need to execute not only application tasks but also some urgent routines (e.g. error-detection actions, consistency checkers, interrupt handlers) with minimum latency. Although fixed-priority schedulers such as Rate-Monotonic (RM) are in line with this need, they usually make a low processor utilization available to the system. Moreover, this availability usually decreases with the number of considered tasks. If dynamic-priority schedulers such as Earliest Deadline First (EDF) are applied instead, high system utilization can be guaranteed but the minimum latency for executing urgent routines may not be ensured. In this paper we describe a scheduling model according to which urgent routines are executed at the highest priority level and all other system tasks are scheduled by EDF. We show that the guaranteed processor utilization for the assumed scheduling model is at least as high as the one provided by RM for two tasks, namely 2(2√−1). Seven polynomial time tests for checking the system timeliness are derived and proved correct. The proposed tests are compared against each other and to an exact but exponential running time test.

Strap repairs using embedded patches: numerical analysis and experimental results

Adhesively bonded repairs offer an attractive option for repair of aluminium structures, compared to more traditional methods such as fastening or welding. The single-strap (SS) and double-strap (DS) repairs are very straightforward to execute but stresses in the adhesive layer peak at the overlap ends. The DS repair requires both sides of the damaged structures to be reachable for repair, which is often not possible. In strap repairs, with the patches bonded at the outer surfaces, some limitations emerge such as the weight, aerodynamics and aesthetics. To minimize these effects, SS and DS repairs with embedded patches were evaluated in this work, such that the patches are flush with the adherends. For this purpose, in this work standard SS and DS repairs, and also with the patches embedded in the adherends, were tested under tension to allow the optimization of some repair variables such as the overlap length (LO) and type of adhesive, thus allowing the maximization of the repair strength. The effect of embedding the patch/patches on the fracture modes and failure loads was compared with finite elements (FE) analysis. The FE analysis was performed in ABAQUS® and cohesive zone modelling was used for the simulation of damage onset and growth in the adhesive layer. The comparison with the test data revealed an accurate prediction for all kinds of joints and provided some principles regarding this technique.

Intra-Task Device Scheduling for Real-Time Embedded Systems

An ever increasing need for extra functionality in a single embedded system demands for extra Input/Output (I/O) devices, which are usually connected externally and are expensive in terms of energy consumption. To reduce their energy consumption, these devices are equipped with power saving mechanisms. While I/O device scheduling for real-time (RT) systems with such power saving features has been studied in the past, the use of energy resources by these scheduling algorithms may be improved. Technology enhancements in the semiconductor industry have allowed the hardware vendors to reduce the device transition and energy overheads. The decrease in overhead of sleep transitions has opened new opportunities to further reduce the device energy consumption. In this research effort, we propose an intra-task device scheduling algorithm for real-time systems that wakes up a device on demand and reduces its active time while ensuring system schedulability. This intra-task device scheduling algorithm is extended for devices with multiple sleep states to further minimise the overall device energy consumption of the system. The proposed algorithms have less complexity when compared to the conservative inter-task device scheduling algorithms. The system model used relaxes some of the assumptions commonly made in the state-of-the-art that restrict their practical relevance. Apart from the aforementioned advantages, the proposed algorithms are shown to demonstrate the substantial energy savings.

Logic-based schedulability analysis for compositional hard real-time embedded systems

Over the past decades several approaches for schedulability analysis have been proposed for both uni-processor and multi-processor real-time systems. Although different techniques are employed, very little has been put forward in using formal specifications, with the consequent possibility for mis-interpretations or ambiguities in the problem statement. Using a logic based approach to schedulability analysis in the design of hard real-time systems eases the synthesis of correct-by-construction procedures for both static and dynamic verification processes. In this paper we propose a novel approach to schedulability analysis based on a timed temporal logic with time durations. Our approach subsumes classical methods for uni-processor scheduling analysis over compositional resource models by providing the developer with counter-examples, and by ruling out schedules that cause unsafe violations on the system. We also provide an example showing the effectiveness of our proposal.

Passive Fault-Tolerance Management in Component-based Embedded Systems

It is imperative to accept that failures can and will occur, even in meticulously designed distributed systems, and design proper measures to counter those failures. Passive replication minimises resource consumption by only activating redundant replicas in case of failures, as typically providing and applying state updates is less resource demanding than requesting execution. However, most existing solutions for passive fault tolerance are usually designed and configured at design time, explicitly and statically identifying the most critical components and their number of replicas, lacking the needed flexibility to handle the runtime dynamics of distributed component-based embedded systems. This paper proposes a cost-effective adaptive fault tolerance solution with a significant lower overhead compared to a strict active redundancy-based approach, achieving a high error coverage with the minimum amount of redundancy. The activation of passive replicas is coordinated through a feedback-based coordination model that reduces the complexity of the needed interactions among components until a new collective global service solution is determined, improving the overall maintainability and robustness of the system.

Embedded Multi-Core systems for Mixed Criticality applications in dynamic and changeable real-time environments

EMC2 finds solutions for dynamic adaptability in open systems. It provides handling of mixed criticality multicore applications in r eal-time conditions, withscalability and utmost flexibility, full-scale deployment and management of integrated tool chains, through the entire lifecycle.

Dependable Embedded Wireless Infrastructure

DEWI will provide key solutions for wireless seamless connectivity and interoperability in the everyday physical environment of citizens, thereby significantly contributing to the emerging smart home and smart public space.

Building a knowledge and learning society in Portugal: adult students in technological schools and higher education institutions

Lifelong learning (LLL) has received increasing attention in recent years. It implies that learning should take place at all stages of the “life cycle and it should be life-wide, that is embedded in all life contexts from the school to the work place, the home and the community” (Green, 2002, p.613). The ‘learning society’, is the vision of a society where there are recognized opportunities for learning for every person, wherever they are and however old they happen to be. Globalization and the rise of new information technologies are some of the driving forces that cause depreciation of specialised competences. This happens very quickly in terms of economic value; consequently, workers of all skills levels, during their working life, must have the opportunity to update “their technical skills and enhance general skills to keep pace with continuous technological change and new job requirements” (Fahr, 2005, p. 75). It is in this context that LLL tops the policy agenda of international bodies, national governments and non-governmental organizations, in the field of education and training, to justify the need for LLL opportunities for the population as they face contemporary employability challenges. It is in this context that the requirement and interest to analyse the behaviour patterns of adult learners has developed over the last few years

Linfangiogénese no tecido adiposo em modelos de doença inflamatória crónica (asma e obesidade): uma abordagem por imunohistoquímica e lipidómica

O tecido adiposo é um órgão endócrino dinâmico, secretando factores importantes na regulação do metabolismo, fluxo vascular sanguíneo e linfático, e função imunológica, entre outros. Em caso de acumulação de tecido adiposo por ingestão de uma dieta gorda, ou por disfunção metabólica, os adipócitos podem desencadear uma reacção inflamatória por falha na drenagem linfática, acumulando-se mediadores inflamatórios, os quais potenciam a propagação da reacção. Assim, questiona-se uma potencial associação entre o aumento de tecido adiposo na obesidade, hipóxia adipocitária e estimulação da linfangiogénese. Além disso, a expressão de adipocinas varia de acordo com a distribuição do tecido adiposo (subcutâneo, TAS e visceral, TAV). Deste modo, pretende-se com este estudo contribuir para o aumento do conhecimento sobre os complexos mecanismos moleculares subjacentes à linfangiogénese. Ensaios com ratinhos da estirpe C57Bl/6J (modelo de obesidade) e BALB/c (modelo de asma e obesidade), divididos em grupos submetidos a dieta normal e dieta rica em gordura. Avaliação semi-quantitativa da expressão tecidular de LYVE-1 (marcador da linfangiogénese) por imunohistoquímica em material embebido em parafina, no TAS e TAV, e cromatografia líquida de ultra-performance acoplada de espectrometria de massa (UPLC-MS) para análise da expressão plasmática de ceramida e esfingosina-1-fosfato (S1P). No modelo de obesidade observou- -se diminuição do número de vasos linfáticos e expressão de LYVE-1 ao longo do tempo no TAV, e aumento de ambos os parâmetros e hipertrofia adipocitária no TAS. As concentrações de ceramida e S1P corroboram a existência de um processo inflamatório nos ratinhos em estudo, ainda que numa fase muito inicial. No modelo de asma e obesidade, após 17 semanas de tratamento, observou-se incremento da linfangiogénese no TAV, mas não no TAS. A resposta inflamatória avaliada através dos diferentes parâmetros permite afirmar que num estadio inicial de obesidade a proliferação linfática poderá estar a ser retardada pela hipertrofia adipocitária. A libertação de adipocinas será observada apenas numa fase posterior, desencadeando todo o processo inflamatório que incrementará a proliferação linfática. Adicionalmente, é possível sugerir que a maior pressão à qual o TAV se encontra sujeito não favorece a proliferação linfática, pelo menos num estadio incial.

Conceptual model for decomposing the value for the customer

Value has been defined in different theoretical contexts as need, desire, interest, standard /criteria, beliefs, attitudes, and preferences. The creation of value is key to any business, and any business activity is about exchanging some tangible and/or intangible good or service and having its value accepted and rewarded by customers or clients, either inside the enterprise or collaborative network or outside. “Perhaps surprising then is that firms often do not know how to define value, or how to measure it” (Anderson and Narus, 1998 cited by [1]). Woodruff echoed that we need “richer customer value theory” for providing an “important tool for locking onto the critical things that managers need to know”. In addition, he emphasized, “we need customer value theory that delves deeply into customer’s world of product use in their situations” [2]. In this sense, we proposed and validated a novel “Conceptual Model for Decomposing the Value for the Customer”. To this end, we were aware that time has a direct impact on customer perceived value, and the suppliers’ and customers’ perceptions change from the pre-purchase to the post-purchase phases, causing some uncertainty and doubts.We wanted to break down value into all its components, as well as every built and used assets (both endogenous and/or exogenous perspectives). This component analysis was then transposed into a mathematical formulation using the Fuzzy Analytic Hierarchy Process (AHP), so that the uncertainty and vagueness of value perceptions could be embedded in this model that relates used and built assets in the tangible and intangible deliverable exchange among the involved parties, with their actual value perceptions.

Nodal price simulation in competitive electricity markets

Locational Marginal Prices (LMP) are important pricing signals for the participants of competitive electricity markets, as the effects of transmission losses and binding constraints are embedded in LMPs [1],[2]. This paper presents a software tool that evaluates the nodal marginal prices considering losses and congestion. The initial dispatch is based on all the electricity transactions negotiated in the pool and in bilateral contracts. It must be checked if the proposed initial dispatch leads to congestion problems; if a congestion situation is detected, it must be solved. An AC power flow is used to verify if there are congestion situations in the initial dispatch. Whenever congestion situations are detected, they are solved and a feasible dispatch (re-dispatch) is obtained. After solving the congestion problems, the simulator evaluates LMP. The paper presents a case study based on the the 118 IEEE bus test network.

ANN based day-ahead spinning reserve forecast for electricity market simulation

Electricity market players operating in a liberalized environment require adequate decision support tools, allowing them to consider all the business opportunities and take strategic decisions. Ancillary services represent a good negotiation opportunity that must be considered by market players. This paper deals with short-term predication of day-ahead spinning reserve (SR) requirement that helps the ISO to make effective and timely decisions. Based on these forecasted information, market participants can use strategic bidding for day-ahead SR market. The proposed concepts and methodologies are implemented in MASCEM, a multi-agent based electricity market simulator. A case study based on California ISO (CAISO) data is included; the forecasted results are presented and compared with CAISO published forecast.