Fractional order control on a wind turbine benchmark

This paper is about a hierarchical structure with an event-based supervisor in a higher level and a fractional-order proportional integral (FOPI) in a lower level applied to a wind turbine. The event-based supervisor analyzes the operation conditions to determine the state of the wind turbine. This controller operate in the full load region and the main objective is to capture maximum power generation while ensuring the performance and reliability required for a wind turbine to be integrated into an electric grid. The main contribution focus on the use of fractional-order proportional integral controller which benefits from the introduction of one more tuning parameter, the integral fractional-order, taking advantage over integer order proportional integral (PI) controller. Comparisons between fractional-order pitch control and a default proportional integral pitch controller applied to a wind turbine benchmark are given and simulation results by Matlab/Simulink are shown in order to prove the effectiveness of the proposed approach.

Fuzzy, integer and fractional-order control: application on a wind turbine benchmark model

This paper presents a comparison between proportional integral control approaches for variable speed wind turbines. Integer and fractional-order controllers are designed using linearized wind turbine model whilst fuzzy controller also takes into account system nonlinearities. These controllers operate in the full load region and the main objective is to extract maximum power from the wind turbine while ensuring the performance and reliability required to be integrated into an electric grid. The main contribution focuses on the use of fractional-order proportional integral (FOPI) controller which benefits from the introduction of one more tuning parameter, the integral fractional-order, taking advantage over integer order proportional integral (PI) controller. A comparison between proposed control approaches for the variable speed wind turbines is presented using a wind turbine benchmark model in the Matlab/Simulink environment. Results show that FOPI has improved system performance when compared with classical PI and fuzzy PI controller outperforms the integer and fractional-order control due to its capability to deal with system nonlinearities and uncertainties. © 2014 IEEE.

Benchmarking de uma aproximação de ticketing as a service (Taas)

Dissertação de natureza científica realizada para obtenção do grau de Mestre em Engenharia de Redes de Computadores e Multimédia

Algorithm-oriented design of efficient many-core architectures applied to dense matrix multiplication

Recent integrated circuit technologies have opened the possibility to design parallel architectures with hundreds of cores on a single chip. The design space of these parallel architectures is huge with many architectural options. Exploring the design space gets even more difficult if, beyond performance and area, we also consider extra metrics like performance and area efficiency, where the designer tries to design the architecture with the best performance per chip area and the best sustainable performance. In this paper we present an algorithm-oriented approach to design a many-core architecture. Instead of doing the design space exploration of the many core architecture based on the experimental execution results of a particular benchmark of algorithms, our approach is to make a formal analysis of the algorithms considering the main architectural aspects and to determine how each particular architectural aspect is related to the performance of the architecture when running an algorithm or set of algorithms. The architectural aspects considered include the number of cores, the local memory available in each core, the communication bandwidth between the many-core architecture and the external memory and the memory hierarchy. To exemplify the approach we did a theoretical analysis of a dense matrix multiplication algorithm and determined an equation that relates the number of execution cycles with the architectural parameters. Based on this equation a many-core architecture has been designed. The results obtained indicate that a 100 mm(2) integrated circuit design of the proposed architecture, using a 65 nm technology, is able to achieve 464 GFLOPs (double precision floating-point) for a memory bandwidth of 16 GB/s. This corresponds to a performance efficiency of 71 %. Considering a 45 nm technology, a 100 mm(2) chip attains 833 GFLOPs which corresponds to 84 % of peak performance These figures are better than those obtained by previous many-core architectures, except for the area efficiency which is limited by the lower memory bandwidth considered. The results achieved are also better than those of previous state-of-the-art many-cores architectures designed specifically to achieve high performance for matrix multiplication.