Photo-induced instability of nanocrystalline silicon TFTs

We examine the instability behavior of nanocrystalline silicon (nc-Si) thin-film transistors (TFTs) in the presence of electrical and optical stress. The change in threshold voltage and sub-threshold slope is more significant under combined bias-and-light stress when compared to bias stress alone. The threshold voltage shift (Delta V-T) after 6 h of bias stress is about 7 times larger in the case with illumination than in the dark. Under bias stress alone, the primary instability mechanism is charge trapping at the semiconductor/insulator interface. In contrast, under combined bias-and-light stress, the prevailing mechanism appears to be the creation of defect states in the channel, and believed to take place in the amorphous phase, where the increase in the electron density induced by electrical bias enhances the non-radiative recombination of photo-excited electron-hole pairs. The results reported here are consistent with observations of photo-induced efficiency degradation in solar cells.

A DC Voltage-Multiplier Circuit Working as a High-Voltage Pulse Generator

The intensive use of semiconductor devices enabled the development of a repetitive high-voltage pulse-generator topology from the dc voltage-multiplier (VM) concept. The proposed circuit is based on an odd VM-type circuit, where a number of dc capacitors share a common connection with different voltage ratings in each one, and the output voltage comes from a single capacitor. Standard VM rectifier and coupling diodes are used for charging the energy-storing capacitors, from an ac power supply, and two additional on/off semiconductors in each stage, to switch from the typical charging VM mode to a pulse mode with the dc energy-storing capacitors connected in series with the load. Results from a 2-kV experimental prototype with three stages, delivering a 10-mu s pulse with a 5-kHz repetition rate into a resistive load, are discussed. Additionally, the proposed circuit is compared against the solid-state Marx generator topology for the same peak input and output voltages.

On the Problem of Balancing the DC Capacitor Voltage Divider in Back-to-Back Multilevel Converters

This paper presents a new generalized solution for DC bus capacitors voltage balancing in back-to-back m level diode-clamped multilevel converters connecting AC networks. The solution is based on the DC bus average power flow and exploits the switching configuration redundancies. The proposed balancing solution is particularized for the back-to-back multilevel structure with m=5 levels. This back-to-back converter is studied working with bidirectional power flow, connecting an induction machine to the power grid.

Predictive Optimal Matrix Converter Control for a Dynamic Voltage Restorer with Flywheel Energy Storage

This paper presents a predictive optimal matrix converter controller for a flywheel energy storage system used as Dynamic Voltage Restorer (DVR). The flywheel energy storage device is based on a steel seamless tube mounted as a vertical axis flywheel to store kinetic energy. The motor/generator is a Permanent Magnet Synchronous Machine driven by the AC-AC Matrix Converter. The matrix control method uses a discrete-time model of the converter system to predict the expected values of the input and output currents for all the 27 possible vectors generated by the matrix converter. An optimal controller minimizes control errors using a weighted cost functional. The flywheel and control process was tested as a DVR to mitigate voltage sags and swells. Simulation results show that the DVR is able to compensate the critical load voltage without delays, voltage undershoots or overshoots, overcoming the input/output coupling of matrix converters.

Solid-state Marx based two-switch voltage modulator for the On-Line Isotope Mass Separator accelerator at the European Organization for Nuclear Research

A new circuit topology is proposed to replace the actual pulse transformer and thyratron based resonant modulator that supplies the 60 kV target potential for the ion acceleration of the On-Line Isotope Mass Separator accelerator, the stability of which is critical for the mass resolution downstream separator, at the European Organization for Nuclear Research. The improved modulator uses two solid-state switches working together, each one based on the Marx generator concept, operating as series and parallel switches, reducing the stress on the series stacked semiconductors, and also as auxiliary pulse generator in order to fulfill the target requirements. Preliminary results of a 10 kV prototype, using 1200 V insulated gate bipolar transistors and capacitors in the solid-state Marx circuits, ten stages each, with an electrical equivalent circuit of the target, are presented, demonstrating both the improved voltage stability and pulse flexibility potential wanted for this new modulator.

Limiting Internal Supply Voltage Spikes in DC-DC Converters

Implementing monolithic DC-DC converters for low power portable applications with a standard low voltage CMOS technology leads to lower production costs and higher reliability. Moreover, it allows miniaturization by the integration of two units in the same die: the power management unit that regulates the supply voltage for the second unit, a dedicated signal processor, that performs the functions required. This paper presents original techniques that limit spikes in the internal supply voltage on a monolithic DC-DC converter, extending the use of the same technology for both units. These spikes are mainly caused by fast current variations in the path connecting the external power supply to the internal pads of the converter power block. This path includes two parasitic inductances inbuilt in bond wires and in package pins. Although these parasitic inductances present relative low values when compared with the typical external inductances of DC-DC converters, their effects can not be neglected when switching high currents at high switching frequency. The associated overvoltage frequently causes destruction, reliability problems and/or control malfunction. Different spike reduction techniques are presented and compared. The proposed techniques were used in the design of the gate driver of a DC-DC converter included in a power management unit implemented in a standard 0.35 mu m CMOS technology.

Repetitive Solid State Pulse Modulator Based on a DC Voltage Multiplier

A newly developed solid-state repetitive high-voltage (HV) pulse modulator topology created from the mature concept of the d.c. voltage multiplier (VM) is described. The proposed circuit is based in a voltage multiplier type circuit, where a number of d.c. capacitors share a common connection with different voltage rating in each one. Hence, besides the standard VM rectifier and coupling diodes, two solid-state on/off switches are used, in each stage, to switch from the typical charging VM mode to a pulse mode with the d.c. capacitors connected in series with the load. Due to the on/off semiconductor configuration, in half-bridge structures, the maximum voltage blocked by each one is the d.c. capacitor voltage in each stage. A 2 kV prototype is described and the results are compared with PSPICE simulations.

Solid-State Bipolar Marx Generator with Voltage Droop Compensation

This paper addresses the voltage droop compensation associated with long pulses generated by solid-stated based high-voltage Marx topologies. In particular a novel design scheme for voltage droop compensation in solid-state based bipolar Marx generators, using low-cost circuitry design and control, is described. The compensation consists of adding one auxiliary PWM stage to the existing Marx stages, without changing the modularity and topology of the circuit, which controls the output voltage and a LC filter that smoothes the voltage droop in both the positive and negative output pulses. Simulation results are presented for 5 stages Marx circuit using 1 kV per stage, with 1 kHz repetition rate and 10% duty cycle.

Palaeomagnetic study of a subaerial volcanic ridge (Sao Jorge Island, Azores) for the past 1.3 Myr: evidence for the Cobb Mountain Subchron, volcano flank instability and tectonomagmatic implications

We present a palaeomagnetic study on 38 lava flows and 20 dykes encompassing the past 1.3 Myr on S. Jorge Island (Azores ArchipelagoNorth Atlantic Ocean). The sections sampled in the southeastern and central/western parts of the island record reversed and normal polarities, respectively. They indicate a mean palaeomagnetic pole (81.3 degrees N, 160.7 degrees E, K= 33 and A95= 3.4 degrees) with a latitude shallower than that expected from Geocentric Axial Dipole assumption, suggesting an effect of non-dipolar components of the Earth magnetic field. Virtual Geomagnetic Poles of eight flows and two dykes closely follow the contemporaneous records of the Cobb Mountain Subchron (ODP/DSDP programs) and constrain the age transition from reversed to normal polarity at ca. 1.207 +/- 0.017 Ma. Volcano flank instabilities, probably related to dyke emplacement along an NNWSSE direction, led to southwestward tilting of the lava pile towards the sea. Two spatially and temporally distinct dyke systems have been recognized on the island. The eastern is dominated by NNWSSE trending dykes emplaced before the end of the Matuyama Chron, whereas in the central/western parts the eruptive fissures oriented WNWESE controlled the westward growth of the S. Jorge Island during the Brunhes Chron. Both directions are consistent with the present-day regional stress conditions deduced from plate kinematics and tectonomorphology and suggest the emplacement of dykes along pre-existing fractures. The distinct timing and location of each dyke system likely results from a slight shift of the magmatic source.

A DC-DC Step-Up mu-Power Converter for Energy Harvesting Applications, Using Maximum Power PointTracking, Based on Fractional Open Circuit Voltage

A DC-DC step-up micro power converter for solar energy harvesting applications is presented. The circuit is based on a switched-capacitorvoltage tripler architecture with MOSFET capacitors, which results in an, area approximately eight times smaller than using MiM capacitors for the 0.131mu m CMOS technology. In order to compensate for the loss of efficiency, due to the larger parasitic capacitances, a charge reutilization scheme is employed. The circuit is self-clocked, using a phase controller designed specifically to work with an amorphous silicon solar cell, in order to obtain themaximum available power from the cell. This will be done by tracking its maximum power point (MPPT) using the fractional open circuit voltage method. Electrical simulations of the circuit, together with an equivalent electrical model of an amorphous silicon solar cell, show that the circuit can deliver apower of 1132 mu W to the load, corresponding to a maximum efficiency of 66.81%.

Fast optimum-predictive control and capacitor voltage balancing strategy for bipolar back-to-back NPC converters in high-voltage direct current transmission systems

Multilevel power converters have been introduced as the solution for high-power high-voltage switching applications where they have well-known advantages. Recently, full back-to-back connected multilevel neutral point diode clamped converters (NPC converter) have been used inhigh-voltage direct current (HVDC) transmission systems. Bipolar-connected back-to-back NPC converters have advantages in long-distance HVDCtransmission systems over the full back-to-back connection, but greater difficulty to balance the dc capacitor voltage divider on both sending and receiving end NPC converters. This study shows that power flow control and dc capacitor voltage balancing are feasible using fast optimum-predictive-based controllers in HVDC systems using bipolar back-to-back-connected five-level NPC multilevel converters. For both converter sides, the control strategytakes in account active and reactive power, which establishes ac grid currents in both ends, and guarantees the balancing of dc bus capacitor voltages inboth NPC converters. Additionally, the semiconductor switching frequency is minimised to reduce switching losses. The performance and robustness of the new fast predictive control strategy, and its capability to solve the DC capacitor voltage balancing problem of bipolar-connected back-to-back NPCconverters are evaluated.

New Technique for Uniform Voltage Sharing in Series Stacked Semiconductors

This paper describes the operation of a solid-state series stacked topology used as a serial and parallel switch in pulsed power applications. The proposed circuit, developed from the Marx generator concept, balances the voltage stress on each series stacked semiconductor, distributing the total voltage evenly. Experimental results from a 10 kV laboratory series stacked switch, using 1200 V semiconductors in a ten stages solid-state series stacked circuit, are reported and discussed, considering resistive, capacitive and inductive type loads for high and low duty factor voltage pulse operation.

A Voltage Limiter Circuit for Indoor Light Energy Harvesting Applications

A voltage limiter circuit for indoor light energy harvesting applications is presented. This circuit is a part of a bigger system, whose function is to harvest indoor light energy, process it and store it, so that it can be used at a later time. This processing consists on maximum power point tracking (MPPT) and stepping-up, of the voltage from the photovoltaic (PV) harvester cell. The circuit here described, ensures that even under strong illumination, the generated voltage will not exceed the limit allowed by the technology, avoiding the degradation, or destruction, of the integrated die. A prototype of the limiter circuit was designed in a 130 nm CMOS technology. The layout of the circuit has a total area of 23414 mu m(2). Simulation results, using Spectre, are presented.

Optical demultiplexer based on an a-SiC:H voltage controlled device

In this paper we present results on the use of a semiconductor heterostructure based on a-SiC:H as a wavelength-division demultiplexer for the visible light spectrum. The proposed device is composed of two stacked p-i-n photodiodes with intrinsic absorber regions adjusted to short and long wavelength absorption and carrier collection. An optoelectronic characterisation of the device was performed in the visible spectrum. Demonstration of the device functionality for WDM applications was done with three different input channels covering the long, the medium and the short wavelengths in the visible range. The recovery of the input channels is explained using the photocurrent spectral dependence on the applied voltage. An electrical model of the WDM device is proposed and supported by the solution of the respective circuit equations. Short range optical communications constitute the major application field however other applications are foreseen. (C) 2010 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Demixing instability in coil-rod blends undergoing polycondensation reactions

The authors extend their earlier work on the stability of a reacting binary polymer blend with respect to demixing [D. J. Read, Macromolecules 31, 899 (1998); P. I. C. Teixeira , Macromolecules 33, 387 (2000)] to the case where one of the polymers is rod-like and may order nematically. As before, the authors combine the random phase approximation for the free energy with a Markov chain model for the chemistry to obtain the spinodal as a function of the relevant degrees of reaction. These are then calculated by assuming a simple second-order chemical kinetics. Results are presented, for linear systems, which illustrate the effects of varying the proportion of coils and rods, their relative sizes, and the strength of the nematic interaction between the rods. (c) 2007 American Institute of Physics.