A checkpointing-enabled and resource-aware Java Virtual Machine for efficient and robust e-Science applications in grid environments

Object-oriented programming languages presently are the dominant paradigm of application development (e. g., Java,. NET). Lately, increasingly more Java applications have long (or very long) execution times and manipulate large amounts of data/information, gaining relevance in fields related with e-Science (with Grid and Cloud computing). Significant examples include Chemistry, Computational Biology and Bio-informatics, with many available Java-based APIs (e. g., Neobio). Often, when the execution of such an application is terminated abruptly because of a failure (regardless of the cause being a hardware of software fault, lack of available resources, etc.), all of its work already performed is simply lost, and when the application is later re-initiated, it has to restart all its work from scratch, wasting resources and time, while also being prone to another failure and may delay its completion with no deadline guarantees. Our proposed solution to address these issues is through incorporating mechanisms for checkpointing and migration in a JVM. These make applications more robust and flexible by being able to move to other nodes, without any intervention from the programmer. This article provides a solution to Java applications with long execution times, by extending a JVM (Jikes research virtual machine) with such mechanisms. Copyright (C) 2011 John Wiley & Sons, Ltd.

Study on influence of the new CoDeSys V3.0 on the existing CoDeSys discipline of the Mind8 Engineering Center

CoDeSys "Controller Development Systems" is a development environment for programming in the area of automation controllers. It is an open source solution completely in line with the international industrial standard IEC 61131-3. All five programming languages for application programming as defined in IEC 61131-3 are available in the development environment. These features give professionals greater flexibility with regard to programming and allow control engineers have the ability to program for many different applications in the languages in which they feel most comfortable. Over 200 manufacturers of devices from different industrial sectors offer intelligent automation devices with a CoDeSys programming interface. In 2006, version 3 was released with new updates and tools. One of the great innovations of the new version of CoDeSys is object oriented programming. Object oriented programming (OOP) offers great advantages to the user for example when wanting to reuse existing parts of the application or when working on one application with several developers. For this reuse can be prepared a source code with several well known parts and this is automatically generated where necessary in a project, users can improve then the time/cost/quality management. Until now in version 2 it was necessary to have hardware interface called “Eni-Server” to have access to the generated XML code. Another of the novelties of the new version is a tool called Export PLCopenXML. This tool makes it possible to export the open XML code without the need of specific hardware. This type of code has own requisites to be able to comply with the standard described above. With XML code and with the knowledge how it works it is possible to do component-oriented development of machines with modular programming in an easy way. Eplan Engineering Center (EEC) is a software tool developed by Mind8 GmbH & Co. KG that allows configuring and generating automation projects. Therefore it uses modules of PLC code. The EEC already has a library to generate code for CoDeSys version 2. For version 3 and the constant innovation of drivers by manufacturers, it is necessary to implement a new library in this software. Therefore it is important to study the XML export to be then able to design any type of machine. The purpose of this master thesis is to study the new version of the CoDeSys XML taking into account all aspects and impact on the existing CoDeSys V2 models and libraries in the company Harro Höfliger Verpackungsmaschinen GmbH. For achieve this goal a small sample named “Traffic light” in CoDeSys version 2 will be done and then, using the tools of the new version it there will be a project with version 3 and also the EEC implementation for the automatically generated code.

Modelo SIG para apoio à análise de sistemas de transportes e usos do solo

Dissertação de natureza científica para obtenção do grau de Mestre em Engenharia Civil

Modelos de simulação em MATSim aplicados à análise de sistemas de transporte

Dissertação para obtenção do grau de Mestre em Engenharia Civil na Área de Especialização de Vias de Comunicação e Transportes

Estudo da qualidade organizacional da unidade de rastreio da retinopatia diabética do Alentejo central: projecto de intervenção comunitária em saúde

Mestrado em Intervenção Sócio-Organizacional na Saúde - Área de especialização: Políticas de Gestão e Administração dos Serviços de Saúde.

Influence of growth temperature and carrier flux on the structure and transport properties of highly oriented CrO2 on Al2O3 (0001)

In this work we report on the structure and magnetic and electrical transport properties of CrO2 films deposited onto (0001) sapphire by atmospheric pressure (AP)CVD from a CrO3 precursor. Films are grown within a broad range of deposition temperatures, from 320 to 410 degrees C, and oxygen carrier gas flow rates of 50-500 seem, showing that it is viable to grow highly oriented a-axis CrO2 films at temperatures as low as 330 degrees C i.e., 60-70 degrees C lower than is reported in published data for the same chemical system. Depending on the experimental conditions, growth kinetic regimes dominated either by surface reaction or by mass-transport mechanisms are identified. The growth of a Cr2O3 interfacial layer as an intrinsic feature of the deposition process is studied and discussed. Films synthesized at 330 degrees C keep the same high quality magnetic and transport properties as those deposited at higher temperatures.

Formation of oriented nickel aggregates in rutile single crystals by Ni implantation

The magnetic and electrical properties of Ni implanted single crystalline TiO2 rutile were studied for nominal implanted fluences between 0.5 x 10(17) cm(-2) and 2.0 x 10(17) cm(-2) with 150 keV energy, corresponding to maximum atomic concentrations between 9 at% and 27 at% at 65 nm depth, in order to study the formation of metallic oriented aggregates. The results indicate that the as implanted crystals exhibit superparamagnetic behavior for the two higher fluences, which is attributed to the formation of nanosized nickel clusters with an average size related with the implanted concentration, while only paramagnetic behavior is observed for the lowest fluence. Annealing at 1073 K induces the aggregation of the implanted nickel and enhances the magnetization in all samples. The associated anisotropic behavior indicates preferred orientations of the nickel aggregates in the rutile lattice consistent with Rutherford backscattering spectrometry-channelling results. Electrical conductivity displays anisotropic behavior but no magnetoresistive effects were detected. (C) 2013 Elsevier B.V. All rights reserved.

Algorithm-oriented design of efficient many-core architectures applied to dense matrix multiplication

Recent integrated circuit technologies have opened the possibility to design parallel architectures with hundreds of cores on a single chip. The design space of these parallel architectures is huge with many architectural options. Exploring the design space gets even more difficult if, beyond performance and area, we also consider extra metrics like performance and area efficiency, where the designer tries to design the architecture with the best performance per chip area and the best sustainable performance. In this paper we present an algorithm-oriented approach to design a many-core architecture. Instead of doing the design space exploration of the many core architecture based on the experimental execution results of a particular benchmark of algorithms, our approach is to make a formal analysis of the algorithms considering the main architectural aspects and to determine how each particular architectural aspect is related to the performance of the architecture when running an algorithm or set of algorithms. The architectural aspects considered include the number of cores, the local memory available in each core, the communication bandwidth between the many-core architecture and the external memory and the memory hierarchy. To exemplify the approach we did a theoretical analysis of a dense matrix multiplication algorithm and determined an equation that relates the number of execution cycles with the architectural parameters. Based on this equation a many-core architecture has been designed. The results obtained indicate that a 100 mm(2) integrated circuit design of the proposed architecture, using a 65 nm technology, is able to achieve 464 GFLOPs (double precision floating-point) for a memory bandwidth of 16 GB/s. This corresponds to a performance efficiency of 71 %. Considering a 45 nm technology, a 100 mm(2) chip attains 833 GFLOPs which corresponds to 84 % of peak performance These figures are better than those obtained by previous many-core architectures, except for the area efficiency which is limited by the lower memory bandwidth considered. The results achieved are also better than those of previous state-of-the-art many-cores architectures designed specifically to achieve high performance for matrix multiplication.