35 resultados para GATE DIELECTRICS
em Repositório Científico do Instituto Politécnico de Lisboa - Portugal
Resumo:
The rapid growth in genetics and molecular biology combined with the development of techniques for genetically engineering small animals has led to increased interest in in vivo small animal imaging. Small animal imaging has been applied frequently to the imaging of small animals (mice and rats), which are ubiquitous in modeling human diseases and testing treatments. The use of PET in small animals allows the use of subjects as their own control, reducing the interanimal variability. This allows performing longitudinal studies on the same animal and improves the accuracy of biological models. However, small animal PET still suffers from several limitations. The amounts of radiotracers needed, limited scanner sensitivity, image resolution and image quantification issues, all could clearly benefit from additional research. Because nuclear medicine imaging deals with radioactive decay, the emission of radiation energy through photons and particles alongside with the detection of these quanta and particles in different materials make Monte Carlo method an important simulation tool in both nuclear medicine research and clinical practice. In order to optimize the quantitative use of PET in clinical practice, data- and image-processing methods are also a field of intense interest and development. The evaluation of such methods often relies on the use of simulated data and images since these offer control of the ground truth. Monte Carlo simulations are widely used for PET simulation since they take into account all the random processes involved in PET imaging, from the emission of the positron to the detection of the photons by the detectors. Simulation techniques have become an importance and indispensable complement to a wide range of problems that could not be addressed by experimental or analytical approaches.
Resumo:
Myocardial Perfusion Gated Single Photon Emission Tomography (Gated-SPET) imaging is used for the combined evaluation of myocardial perfusion and left ventricular (LV) function. But standard protocols of the Gated-SPECT studies require long acquisition times for each study. It is therefore important to reduce as much as possible the total duration of image acquisition. However, it is known that this reduction leads to decrease on counts statistics per projection and raises doubts about the validity of the functional parameters determined by Gated-SPECT. Considering that, it’s difficult to carry out this analysis in real patients. For ethical, logistical and economical matters, simulated studies could be required for this analysis. Objective: Evaluate the influence of the total number of counts acquired from myocardium, in the calculation of myocardial functional parameters (LVEF – left ventricular ejection fraction, EDV – end-diastolic volume, ESV – end-sistolic volume) using routine software procedures.
Resumo:
Myocardial Perfusion Gated Single Photon Emission Tomography (Gated-SPET) imaging is used for the combined evaluation of myocardial perfusion and left ventricular (LV). The purpose of this study is to evaluate the influence of the total number of counts acquired from myocardium, in the calculation of myocardial functional parameters using routine software procedures. Methods: Gated-SPET studies were simulated using Monte Carlo GATE package and NURBS phantom. Simulated data were reconstructed and processed using the commercial software package Quantitative Gated-SPECT. The Bland-Altman and Mann-Whitney-Wilcoxon tests were used to analyze the influence of the number of total counts in the calculation of LV myocardium functional parameters. Results: In studies simulated with 3MBq in the myocardium there were significant differences in the functional parameters: Left ventricular ejection fraction (LVEF), end-systolic volume (ESV), Motility and Thickness; between studies acquired with 15s/projection and 30s/projection. Simulations with 4.2MBq show significant differences in LVEF, end-diastolic volume (EDV) and Thickness. Meanwhile in the simulations with 5.4MBq and 8.4MBq the differences were statistically significant for Motility and Thickness. Conclusion: The total number of counts per simulation doesn't significantly interfere with the determination of Gated-SPET functional parameters using the administered average activity of 450MBq to 5.4MBq in myocardium.
Resumo:
Myocardial perfusion gated-single photon emission computed tomography (gated-SPECT) imaging is used for the combined evaluation of myocardial perfusion and left ventricular (LV) function. The aim of this study is to analyze the influence of counts/pixel and concomitantly the total counts in the myocardium for the calculation of myocardial functional parameters. Material and methods: Gated-SPECT studies were performed using a Monte Carlo GATE simulation package and the NCAT phantom. The simulations of these studies use the radiopharmaceutical 99mTc-labeled tracers (250, 350, 450 and 680MBq) for standard patient types, effectively corresponding to the following activities of myocardium: 3, 4.2, 5.4-8.2MBq. All studies were simulated using 15 and 30s/projection. The simulated data were reconstructed and processed by quantitative-gated-SPECT software, and the analysis of functional parameters in gated-SPECT images was done by using Bland-Altman test and Mann-Whitney-Wilcoxon test. Results: In studies simulated using different times (15 and 30s/projection), it was noted that for the activities for full body: 250 and 350MBq, there were statistically significant differences in parameters Motility and Thickness. For the left ventricular ejection fraction (LVEF), end-systolic volume (ESV) it was only for 250MBq, and 350MBq in the end-diastolic volume (EDV), while the simulated studies with 450 and 680MBq showed no statistically significant differences for global functional parameters: LVEF, EDV and ESV. Conclusion: The number of counts/pixel and, concomitantly, the total counts per simulation do not significantly interfere with the determination of gated-SPECT functional parameters, when using the administered average activity of 450MBq, corresponding to the 5.4MBq of the myocardium, for standard patient types.
Resumo:
Hyperspectral instruments have been incorporated in satellite missions, providing large amounts of data of high spectral resolution of the Earth surface. This data can be used in remote sensing applications that often require a real-time or near-real-time response. To avoid delays between hyperspectral image acquisition and its interpretation, the last usually done on a ground station, onboard systems have emerged to process data, reducing the volume of information to transfer from the satellite to the ground station. For this purpose, compact reconfigurable hardware modules, such as field-programmable gate arrays (FPGAs), are widely used. This paper proposes an FPGA-based architecture for hyperspectral unmixing. This method based on the vertex component analysis (VCA) and it works without a dimensionality reduction preprocessing step. The architecture has been designed for a low-cost Xilinx Zynq board with a Zynq-7020 system-on-chip FPGA-based on the Artix-7 FPGA programmable logic and tested using real hyperspectral data. Experimental results indicate that the proposed implementation can achieve real-time processing, while maintaining the methods accuracy, which indicate the potential of the proposed platform to implement high-performance, low-cost embedded systems, opening perspectives for onboard hyperspectral image processing.
Resumo:
A new circuit topology is proposed to replace the actual pulse transformer and thyratron based resonant modulator that supplies the 60 kV target potential for the ion acceleration of the On-Line Isotope Mass Separator accelerator, the stability of which is critical for the mass resolution downstream separator, at the European Organization for Nuclear Research. The improved modulator uses two solid-state switches working together, each one based on the Marx generator concept, operating as series and parallel switches, reducing the stress on the series stacked semiconductors, and also as auxiliary pulse generator in order to fulfill the target requirements. Preliminary results of a 10 kV prototype, using 1200 V insulated gate bipolar transistors and capacitors in the solid-state Marx circuits, ten stages each, with an electrical equivalent circuit of the target, are presented, demonstrating both the improved voltage stability and pulse flexibility potential wanted for this new modulator.
Resumo:
In this paper we present an amorphous silicon device that can be used in two operation modes to measure the concentration of ions in solution. While crystalline devices present a higher sensitivity, their amorphous counterpart present a much lower fabrication cost, thus enabling the production of cheap disposable sensors for use, for example, in the food industry. The devices were fabricated on glass substrates by the PECVD technique in the top gate configuration, where the metallic gate is replaced by an electrolytic solution with an immersed Ag/AgCl reference electrode. Silicon nitride is used as gate dielectric enhancing the sensitivity and passivation layer used to avoid leakage and electrochemical reactions. In this article we report on the semiconductor unit, showing that the device can be operated in a light-assisted mode, where changes in the pH produce changes on the measured ac photocurrent. In alternative the device can be operated as a conventional ion selective field effect device where changes in the pH induce changes in the transistor's threshold voltage.
Resumo:
Implementing monolithic DC-DC converters for low power portable applications with a standard low voltage CMOS technology leads to lower production costs and higher reliability. Moreover, it allows miniaturization by the integration of two units in the same die: the power management unit that regulates the supply voltage for the second unit, a dedicated signal processor, that performs the functions required. This paper presents original techniques that limit spikes in the internal supply voltage on a monolithic DC-DC converter, extending the use of the same technology for both units. These spikes are mainly caused by fast current variations in the path connecting the external power supply to the internal pads of the converter power block. This path includes two parasitic inductances inbuilt in bond wires and in package pins. Although these parasitic inductances present relative low values when compared with the typical external inductances of DC-DC converters, their effects can not be neglected when switching high currents at high switching frequency. The associated overvoltage frequently causes destruction, reliability problems and/or control malfunction. Different spike reduction techniques are presented and compared. The proposed techniques were used in the design of the gate driver of a DC-DC converter included in a power management unit implemented in a standard 0.35 mu m CMOS technology.
Design of improved rail-to-rail low-distortion and low-stress switches in advanced CMOS technologies
Resumo:
This paper describes the efficient design of an improved and dedicated switched-capacitor (SC) circuit capable of linearizing CMOS switches to allow SC circuits to reach low distortion levels. The described circuit (SC linearization control circuit, SLC) has the advantage over conventional clock-bootstrapping circuits of exhibiting low-stress, since large gate voltages are avoided. This paper presents exhaustive corner simulation results of a SC sample-and-hold (S/H) circuit which employs the proposed and optimized circuits, together with the experimental evaluation of a complete 10-bit ADC utilizing the referred S/H circuit. These results show that the SLC circuits can reduce distortion and increase dynamic linearity above 12 bits for wide input signal bandwidths.
Resumo:
O trabalho apresentado nesta dissertação refere-se à concepção, projecto e realização experimental de um conversor estático de potência tolerante a falhas. Foram analisados trabalhos de investigação sobre modos de falha de conversores electrónicos de potência, topologias de conversores tolerantes a falhas, métodos de detecção de falhas, entre outros. Com vista à concepção de uma solução, foram nomeados e analisados os principais modos de falhas para três soluções propostas de conversores com topologias tolerantes a falhas onde existem elementos redundantes em modo de espera. Foram analisados os vários aspectos de natureza técnica dos circuitos de potência e guiamento de sinais onde se salientam a necessidade de tempos mortos entre os sinais de disparo de IGBT do mesmo ramo, o isolamento galvânico entre os vários andares de disparo, a necessidade de minimizar as auto-induções entre o condensador DC e os braços do conversor de potência. Com vista a melhorar a fiabilidade e segurança de funcionamento do conversor estático de potência tolerante a falhas, foi concebido um circuito electrónico permitindo a aceleração da actuação normal de contactores e outro circuito responsável pelo encaminhamento e inibição dos sinais de disparo. Para a aplicação do conversor estático de potência tolerante a falhas desenvolvido num accionamento com um motor de corrente contínua, foi implementado um algoritmo de controlo numa placa de processamento digital de sinais (DSP), sendo a supervisão e actuação do sistema realizados em tempo-real, para a detecção de falhas e actuação de contactores e controlo de corrente e velocidade do motor utilizando uma estratégia de comando PWM. Foram realizados ensaios que, mediante uma detecção adequada de falhas, realiza a comutação entre blocos de conversores de potência. São apresentados e discutidos resultados experimentais, obtidos usando o protótipo laboratorial.
Resumo:
O downpull é uma força gerada pelo efeito do escoamento em comportas planas com estanquidade a jusante e pode condicionar, de forma determinante, o dimensionamento do órgão de manobra e a preponderância de fecho de uma comporta vertical em condições de emergência. Neste trabalho é desenvolvido um modelo de cálculo analítico para a obtenção do downpull e um modelo de simulação numérica com Computational Fluid Dynamics (CFD). O modelo analítico desenvolvido foi exposto numa folha de cálculo e permite a obtenção de resultados em poucos minutos, factor essencial sob o ponto de vista económico. O modelo em CFD tem como principal objectivo a validação do modelo analítico. Sendo um modelo mais complexo e dispendioso em termos de tempo despendido, apenas poderá ser utilizado em situações pontuais que exijam um maior rigor nos resultados obtidos.
Resumo:
As comportas de vigas de fundo, objecto de estudo no presente trabalho, são essenciais devido à sua capacidade de controlo do fluxo de água em casos de emergência. Assim este trabalho visou o dimensionamento e análise estrutural de uma comporta dessa natureza. Para o seu dimensionamento foi essencial a norma DIN19704-1:1998, que define todos os padrões que devem ser levados em conta numa construção hidráulica em aço. Deste modo, após uma breve descrição do enquadramento e do estado da arte relativamente a este assunto, foram apresentados ao longo do trabalho, os cálculos dos principais componentes mecânicos que fazem parte dum projecto de uma comporta de vigas. Para comprovar a validade do dimensionamento da comporta realizado através da norma, recorreu-se a um software de análise e simulação por elementos finitos, COSMOSWorks, no sentido de assim prever o comportamento mecânico em análise estática linear, que as solicitações mecânicas em presença têm sobre a comporta. Os resultados da comparação entre o dimensionamento teórico e a análise de tensões através do COSMOSWorks nos elementos mais críticos da estrutura, permitem concluir globalmente que a comporta está bem dimensionada tendo em conta os esforços que tem de suportar.
Resumo:
O presente trabalho consiste na implementação em hardware de unidades funcionais dedicadas e optimizadas, para a realização das operações de codificação e descodificação, definidas na norma de codificação com perda Joint Photographic Experts Group (JPEG), ITU-T T.81 ISO/IEC 10918-1. Realiza-se um estudo sobre esta norma de forma a caracterizar os seus principais blocos funcionais. A finalidade deste estudo foca-se na pesquisa e na proposta de optimizações, de forma a minimizar o hardware necessário para a realização de cada bloco, de modo a que o sistema realizado obtenha taxas de compressão elevadas, minimizando a distorção obtida. A redução de hardware de cada sistema, codificador e descodificador, é conseguida à custa da manipulação das equações dos blocos Forward Discrete Cosine Transform (FDCT) e Quantificação (Q) e dos blocos Forward Discrete Cosine Transform (IDCT) e Quantificação Inversa (IQ). Com as conclusões retiradas do estudo e através da análise de estruturas conhecidas, descreveu-se cada bloco em Very-High-Speed Integrated Circuits (VHSIC) Hardware Description Language (VHDL) e fez-se a sua síntese em Field Programmable Gate Array (FPGA). Cada sistema implementado recorre à execução de cada bloco em paralelo de forma a optimizar a codificação/descodificação. Assim, para o sistema codificador, será realizada a operação da FDCT e Quantificação sobre duas matrizes diferentes e em simultâneo. O mesmo sucede para o sistema descodificador, composto pelos blocos Quantificação Inversa e IDCT. A validação de cada bloco sintetizado é executada com recurso a vectores de teste obtidos através do estudo efectuado. Após a integração de cada bloco, verificou-se que, para imagens greyscale de referência com resolução de 256 linhas por 256 colunas, é necessário 820,5 μs para a codificação de uma imagem e 830,5 μs para a descodificação da mesma. Considerando uma frequência de trabalho de 100 MHz, processam-se aproximadamente 1200 imagens por segundo.
Resumo:
Toxic amides, such as acrylamide, are potentially harmful to Human health, so there is great interest in the fabrication of compact and economical devices to measure their concentration in food products and effluents. The CHEmically Modified Field Effect Transistor (CHEMFET) based onamorphous silicon technology is a candidate for this type of application due to its low fabrication cost. In this article we have used a semi-empirical modelof the device to predict its performance in a solution of interfering ions. The actual semiconductor unit of the sensor was fabricated by the PECVD technique in the top gate configuration. The CHEMFET simulation was performed based on the experimental current voltage curves of the semiconductor unit and on an empirical model of the polymeric membrane. Results presented here are useful for selection and design of CHEMFET membranes and provide an idea of the limitations of the amorphous CHEMFET device. In addition to the economical advantage, the small size of this prototype means it is appropriate for in situ operation and integration in a sensor array.
Resumo:
This paper describes the operation of a solid-state series stacked topology used as a serial and parallel switch in pulsed power applications. The proposed circuit, developed from the Marx generator concept, balances the voltage stress on each series stacked semiconductor, distributing the total voltage evenly. Experimental results from a 10 kV laboratory series stacked switch, using 1200 V semiconductors in a ten stages solid-state series stacked circuit, are reported and discussed, considering resistive, capacitive and inductive type loads for high and low duty factor voltage pulse operation.