6 resultados para Boolean Computations
em Repositório Científico do Instituto Politécnico de Lisboa - Portugal
Resumo:
Este Trabalho refere-se ao Projecto de Execução de Fundações e Estruturas de uma Ponte Rodoviária em betão armado pré-esforçado, realizado no âmbito do Trabalho Final de Mestrado em Engenharia Civil – Especialização em Estruturas, do Instituto Superior de Engenharia de Lisboa. O Projecto de Execução é composto de Peças Escritas e Peças Desenhadas. Nas Peças Escritas estão incluídos: Memória Justificativa e Descritiva; Cálculos Justificativos e Anexos. A ponte é composta por dois tabuleiros paralelos com 10,28m de largura cada um e afastados entre si de 0,10m. A obra é constituída de 8 tramos; os tramos correntes com 31m de comprimento e os tramos extremos com 25 e 20m de comprimento, perfazendo um comprimento total de 231m. A obra foi parcialmente isolada dos sismos pela introdução, em todos os pilares, de aparelhos de apoio de elevado amortecimento sísmico do tipo HDRB (High Damping Rubber Bearings). Encontram-se particularmente discriminadas e detalhadas neste projecto as seguintes situações: - Cálculo do Pré-esforço e respectivas perdas; - Acção das sobrecargas rodoviárias; - Diferença de comportamento da obra na entrada em serviço e no longo prazo; - Análise sísmica e do isolamento sísmico; - Estudo dos efeitos diferidos: retracção e fluência. Tendo as abordagens de cálculo e as verificações de segurança seguido a regulamentação nacional em vigor, nomeadamente RSA e REBAP, foi no entanto feita uma aproximação às regras do “Capacity Design” previstas no EC8, em que se privilegia a actuação do projectista sobre o comportamento da estrutura, procurando uma resposta não linear da mesma, visando garantir que: - A rotura não ocorrerá nos elementos de fundação; - Nos pilares a dissipação de energia se faz através de rótulas plásticas, evitando-se roturas associadas a esforços transversos. A aplicação destas regras neste Projecto demonstrou haver um agravamento substancial na definição dos esforços a que devem resistir alguns dos componentes da estrutura, designadamente os pilares e as fundações, originando soluções de secções de betão e armaduras bem mais exigentes do que aqueles que resultariam da simples verificação de segurança, pela comparação entre esforços actuante e esforços resistentes “secção a secção”, imposta pela actual regulamentação nacional.
Resumo:
It is important to understand and forecast a typical or a particularly household daily consumption in order to design and size suitable renewable energy systems and energy storage. In this research for Short Term Load Forecasting (STLF) it has been used Artificial Neural Networks (ANN) and, despite the consumption unpredictability, it has been shown the possibility to forecast the electricity consumption of a household with certainty. The ANNs are recognized to be a potential methodology for modeling hourly and daily energy consumption and load forecasting. Input variables such as apartment area, numbers of occupants, electrical appliance consumption and Boolean inputs as hourly meter system were considered. Furthermore, the investigation carried out aims to define an ANN architecture and a training algorithm in order to achieve a robust model to be used in forecasting energy consumption in a typical household. It was observed that a feed-forward ANN and the Levenberg-Marquardt algorithm provided a good performance. For this research it was used a database with consumption records, logged in 93 real households, in Lisbon, Portugal, between February 2000 and July 2001, including both weekdays and weekend. The results show that the ANN approach provides a reliable model for forecasting household electric energy consumption and load profile. © 2014 The Author.
Resumo:
The purpose of this paper is to discuss the linear solution of equality constrained problems by using the Frontal solution method without explicit assembling. Design/methodology/approach - Re-written frontal solution method with a priori pivot and front sequence. OpenMP parallelization, nearly linear (in elimination and substitution) up to 40 threads. Constraints enforced at the local assembling stage. Findings - When compared with both standard sparse solvers and classical frontal implementations, memory requirements and code size are significantly reduced. Research limitations/implications - Large, non-linear problems with constraints typically make use of the Newton method with Lagrange multipliers. In the context of the solution of problems with large number of constraints, the matrix transformation methods (MTM) are often more cost-effective. The paper presents a complete solution, with topological ordering, for this problem. Practical implications - A complete software package in Fortran 2003 is described. Examples of clique-based problems are shown with large systems solved in core. Social implications - More realistic non-linear problems can be solved with this Frontal code at the core of the Newton method. Originality/value - Use of topological ordering of constraints. A-priori pivot and front sequences. No need for symbolic assembling. Constraints treated at the core of the Frontal solver. Use of OpenMP in the main Frontal loop, now quantified. Availability of Software.
Resumo:
Data analytic applications are characterized by large data sets that are subject to a series of processing phases. Some of these phases are executed sequentially but others can be executed concurrently or in parallel on clusters, grids or clouds. The MapReduce programming model has been applied to process large data sets in cluster and cloud environments. For developing an application using MapReduce there is a need to install/configure/access specific frameworks such as Apache Hadoop or Elastic MapReduce in Amazon Cloud. It would be desirable to provide more flexibility in adjusting such configurations according to the application characteristics. Furthermore the composition of the multiple phases of a data analytic application requires the specification of all the phases and their orchestration. The original MapReduce model and environment lacks flexible support for such configuration and composition. Recognizing that scientific workflows have been successfully applied to modeling complex applications, this paper describes our experiments on implementing MapReduce as subworkflows in the AWARD framework (Autonomic Workflow Activities Reconfigurable and Dynamic). A text mining data analytic application is modeled as a complex workflow with multiple phases, where individual workflow nodes support MapReduce computations. As in typical MapReduce environments, the end user only needs to define the application algorithms for input data processing and for the map and reduce functions. In the paper we present experimental results when using the AWARD framework to execute MapReduce workflows deployed over multiple Amazon EC2 (Elastic Compute Cloud) instances.
Resumo:
In this paper we exploit the nonlinear property of the SiC multilayer devices to design an optical processor for error detection that enables reliable delivery of spectral data of four-wave mixing over unreliable communication channels. The SiC optical processor is realized by using double pin/pin a-SiC:H photodetector with front and back biased optical gating elements. Visible pulsed signals are transmitted together at different bit sequences. The combined optical signal is analyzed. Data show that the background acts as selector that picks one or more states by splitting portions of the input multi optical signals across the front and back photodiodes. Boolean operations such as EXOR and three bit addition are demonstrated optically, showing that when one or all of the inputs are present, the system will behave as an XOR gate representing the SUM. When two or three inputs are on, the system acts as AND gate indicating the present of the CARRY bit. Additional parity logic operations are performed using four incoming pulsed communication channels that are transmitted and checked for errors together. As a simple example of this approach, we describe an all-optical processor for error detection and then provide an experimental demonstration of this idea. (C) 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Resumo:
The SiC optical processor for error detection and correction is realized by using double pin/pin a-SiC:H photodetector with front and back biased optical gating elements. Data shows that the background act as selector that pick one or more states by splitting portions of the input multi optical signals across the front and back photodiodes. Boolean operations such as exclusive OR (EXOR) and three bit addition are demonstrated optically with a combination of such switching devices, showing that when one or all of the inputs are present the output will be amplified, the system will behave as an XOR gate representing the SUM. When two or three inputs are on, the system acts as AND gate indicating the present of the CARRY bit. Additional parity logic operations are performed by use of the four incoming pulsed communication channels that are transmitted and checked for errors together. As a simple example of this approach, we describe an all optical processor for error detection and correction and then, provide an experimental demonstration of this fault tolerant reversible system, in emerging nanotechnology.