9 resultados para Advanced metering infrastructure(AMI)

em Repositório Científico do Instituto Politécnico de Lisboa - Portugal


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This paper describes the efficient design of an improved and dedicated switched-capacitor (SC) circuit capable of linearizing CMOS switches to allow SC circuits to reach low distortion levels. The described circuit (SC linearization control circuit, SLC) has the advantage over conventional clock-bootstrapping circuits of exhibiting low-stress, since large gate voltages are avoided. This paper presents exhaustive corner simulation results of a SC sample-and-hold (S/H) circuit which employs the proposed and optimized circuits, together with the experimental evaluation of a complete 10-bit ADC utilizing the referred S/H circuit. These results show that the SLC circuits can reduce distortion and increase dynamic linearity above 12 bits for wide input signal bandwidths.

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Com vista a revolucionar o sector das comunicações móveis, muito à custa dos elevados débitos prometidos, a tecnologia LTE recorre a uma técnica que se prevê que seja bastante utilizada nas futuras redes de comunicações móveis: Relaying. Juntamente com esta técnica, o LTE recorre à técnica MIMO, para melhorar a qualidade da transmissão em ambientes hostis e oferecer elevados ritmos de transmissão. No planeamento das próximas redes LTE, o recurso à técnica Relaying é frequente. Esta técnica, tem como objectivo aumentar a cobertura e/ou capacidade da rede, e ainda melhorar o seu desempenho em condições de fronteira de célula. A performance de uma RS depende da sua localização, das condições de propagação do canal rádio a que tanto a RS como o EU estão sujeitos, e ainda da capacidade que a RS tem de receber, processar e reencaminhar a informação. O objectivo da tese é estudar a relação existente entre o posicionamento de uma RS e o seu desempenho. Desta forma, pretende-se concluir qual a posição ideal de uma RS (tanto do tipo AF como SDF). Para além deste estudo, é apresentado um comparativo do desempenho dos modos MIMO TD e OL-SM, onde se conclui em que condições deverão ser utilizados, numa rede LTE equipada com FRSs.

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Recently, several distributed video coding (DVC) solutions based on the distributed source coding (DSC) paradigm have appeared in the literature. Wyner-Ziv (WZ) video coding, a particular case of DVC where side information is made available at the decoder, enable to achieve a flexible distribution of the computational complexity between the encoder and decoder, promising to fulfill novel requirements from applications such as video surveillance, sensor networks and mobile camera phones. The quality of the side information at the decoder has a critical role in determining the WZ video coding rate-distortion (RD) performance, notably to raise it to a level as close as possible to the RD performance of standard predictive video coding schemes. Towards this target, efficient motion search algorithms for powerful frame interpolation are much needed at the decoder. In this paper, the RD performance of a Wyner-Ziv video codec is improved by using novel, advanced motion compensated frame interpolation techniques to generate the side information. The development of these type of side information estimators is a difficult problem in WZ video coding, especially because the decoder only has available some reference, decoded frames. Based on the regularization of the motion field, novel side information creation techniques are proposed in this paper along with a new frame interpolation framework able to generate higher quality side information at the decoder. To illustrate the RD performance improvements, this novel side information creation framework has been integrated in a transform domain turbo coding based Wyner-Ziv video codec. Experimental results show that the novel side information creation solution leads to better RD performance than available state-of-the-art side information estimators, with improvements up to 2 dB: moreover, it allows outperforming H.264/AVC Intra by up to 3 dB with a lower encoding complexity.

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This paper presents a direct power control (DPC) for three-phase matrix converters operating as unified power flow controllers (UPFCs). Matrix converters (MCs) allow the direct ac/ac power conversion without dc energy storage links; therefore, the MC-based UPFC (MC-UPFC) has reduced volume and cost, reduced capacitor power losses, together with higher reliability. Theoretical principles of direct power control (DPC) based on sliding mode control techniques are established for an MC-UPFC dynamic model including the input filter. As a result, line active and reactive power, together with ac supply reactive power, can be directly controlled by selecting an appropriate matrix converter switching state guaranteeing good steady-state and dynamic responses. Experimental results of DPC controllers for MC-UPFC show decoupled active and reactive power control, zero steady-state tracking error, and fast response times. Compared to an MC-UPFC using active and reactive power linear controllers based on a modified Venturini high-frequency PWM modulator, the experimental results of the advanced DPC-MC guarantee faster responses without overshoot and no steady-state error, presenting no cross-coupling in dynamic and steady-state responses.

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This paper seeks to investigate the effectiveness of sea-defense structures in preventing/reducing the tsunami overtopping as well as evaluating the resulting tsunami impact at El Jadida, Morocco. Different tsunami wave conditions are generated by considering various earthquake scenarios of magnitudes ranging from M-w = 8.0 to M-w = 8.6. These scenarios represent the main active earthquake faults in the SW Iberia margin and are consistent with two past events that generated tsunamis along the Atlantic coast of Morocco. The behavior of incident tsunami waves when interacting with coastal infrastructures is analyzed on the basis of numerical simulations of near-shore tsunami waves' propagation. Tsunami impact at the affected site is assessed through computing inundation and current velocity using a high-resolution digital terrain model that incorporates bathymetric, topographic and coastal structures data. Results, in terms of near-shore tsunami propagation snapshots, waves' interaction with coastal barriers, and spatial distributions of flow depths and speeds, are presented and discussed in light of what was observed during the 2011 Tohoku-oki tsunami. Predicted results show different levels of impact that different tsunami wave conditions could generate in the region. Existing coastal barriers around the El Jadida harbour succeeded in reflecting relatively small waves generated by some scenarios, but failed in preventing the overtopping caused by waves from others. Considering the scenario highly impacting the El Jadida coast, significant inundations are computed at the sandy beach and unprotected areas. The modeled dramatic tsunami impact in the region shows the need for additional tsunami standards not only for sea-defense structures but also for the coastal dwellings and houses to provide potential in-place evacuation.

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A novel high throughput and scalable unified architecture for the computation of the transform operations in video codecs for advanced standards is presented in this paper. This structure can be used as a hardware accelerator in modern embedded systems to efficiently compute all the two-dimensional 4 x 4 and 2 x 2 transforms of the H.264/AVC standard. Moreover, its highly flexible design and hardware efficiency allows it to be easily scaled in terms of performance and hardware cost to meet the specific requirements of any given video coding application. Experimental results obtained using a Xilinx Virtex-5 FPGA demonstrated the superior performance and hardware efficiency levels provided by the proposed structure, which presents a throughput per unit of area relatively higher than other similar recently published designs targeting the H.264/AVC standard. Such results also showed that, when integrated in a multi-core embedded system, this architecture provides speedup factors of about 120x concerning pure software implementations of the transform algorithms, therefore allowing the computation, in real-time, of all the above mentioned transforms for Ultra High Definition Video (UHDV) sequences (4,320 x 7,680 @ 30 fps).

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Prémio - CEN/TC 287 AWARD FOR EXCELLENCE IN INSIRE 2012 Implementation of the INSPIRE Directive on Road Infrastructure in Portugal Inês Soares, aluna de Mestrado em engenharia civil do ISEL, Instituto Superior de Engenharia de Lisboa e Paulo Martins, e o seu orientador, receberam um prémio europeu, no dia 27 de junho, em Istambul na Turquia, numa conferência internacional organizada pela Comissão Europeia e pelo governo Turco.  A jovem portuguesa foi escolhida entre cerca de 20 candidatos de vários países. Paulo Matos Martins, professor no ISEL, além de mentor do trabalho premiado, foi orientador de mestrado da aluna e explica que se trata de um estudo sobre a aplicação da Diretiva comunitária INSPIRE à infraestrutura rodoviária nacional que contou com a estreita colaboração do InIR, Instituto da Infraestrutura Rodoviária através da coorientação da engenheira Adelaide Costa e colaboração técnica do engenheiro Rui Luso Soares.  O projeto-piloto correspondeu à criação de uma aplicação informática que permite aceder a informação geográfica harmonizada relativa à infraestrutura rodoviária nacional, de acordo com as disposições de execução INSPIRE, dando cumprimento aos requisitos impostos pela Diretiva às entidades responsáveis por este tipo de informação, entre as quais se incluem diversos organismos públicos (podendo no futuro vir a incluir as autarquias), permitindo aos decisores políticos e a todos os cidadãos o fácil acesso a informação de qualidade sobre as infraestruturas, o território e o ambiente. 

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Trabalho Final de Mestrado para obtenção do grau de Mestre em Engenharia de Electrónica e Telecomunicações

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The complexity associated with fast growing of B2B and the lack of a (complete) suite of open standards makes difficulty to maintain the underlying collaborative processes. Aligned to this challenge, this paper aims to be a contribution to an open architecture of logistics and transport processes management system. A model of an open integrated system is being defined as an open computational responsibility from the embedded systems (on-board) as well as a reference implementation (prototype) of a host system to validate the proposed open interfaces. Embedded subsystem can, natively, be prepared to cooperate with other on-board units and with IT-systems in an infrastructure commonly referred to as a center information system or back-office. In interaction with a central system the proposal is to adopt an open framework for cooperation where the embedded unit or the unit placed somewhere (land/sea) interacts in response to a set of implemented capabilities.