Adaptive digital receivers for analog front-end mismatch correction

Phase and gain mismatches between the I and Q analog signal processing paths of a quadrature receiver are responsible for the generation of image signals which limit the dynamic range of a practical receiver. In this paper we analyse the effects these mismatches and propose a low-complexity blind adaptive algorithm to minimize this problem. The proposed solution is based on two, 2-tap adaptive filters, arranged in Adaptive Noise Canceller (ANC) set-up. The algorithm lends itself to efficient real-time implementation with minimal increase in modulator complexity.

Adaptive compensation of analog front-end I/Q mismatches in digital receivers

I and Q Channel phase and gain misniatches are of great concern in communications receiver design. In this paper we analyse the effects of I and Q channel mismatches and propose a low-complexity blind adaptive algorithm to minimize this problem. The proposed solution consists of two, 2-tap adaptive filters, arranged in Adaptive Noise Canceller (ANC) set-up, with the output of one cross-fed to the input of the other. The system works as a de-correlator eliminating I and Q mismatch errors.

Design of a power-aware digital image rejection receiver

This paper deals with and details the design of a power-aware adaptive digital image rejection receiver based on blind-source-separation that alleviates the RF analog front-end impairments. Power-aware system design at the RTL level without having to redesign arithmetic circuits is used to reduce the power consumption in nomadic devices. Power-aware multipliers with configurable precision are used to trade-off the image-rejection-ratio (IRR) performance with power consumption. Results of the simulation case studies demonstrate that the IRR performance of the power-aware system is comparable to that of the normal implementation albeit degraded slightly, but well within the acceptable limits.

NFC RF Analog Challenge and Enhanced High Speed Transmitter Design

This paper investigates the inherent radio frequency analog challenges associated with near field communication systems. Furthermore, the paper presents a digital based sigma-delta modulator for near field communication transmitter implementations. The proposed digital transmitter architecture is designed to best support data intensive applications requiring higher data rates and complex modulation schemes. An NFC transmitter based on a single-bit sigma-delta DAC is introduced, and then the multi-bit extension with necessary simulation results are presented to confirm the suitability of the architecture for near field communication high speed applications.