20 resultados para Receiver

em WestminsterResearch - UK


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An adaptive self-calibrating image rejection receiver is described, containing a modified Weaver image rejection mixer and a Digital Image Rejection Processor (DIRP). The blind source-separation-based DIRP eliminates the I/Q errors improving the Image Rejection Ratio (IRR) without the need for trimming or use of power-hungry discrete components. Hardware complexity is minimal, requiring only two complex coefficients; hence it can be easily integrated into the signal processing path of any receiver. Simulation results show that the proposed approach achieves 75-97 dB of IRR.

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In this paper, we carry out a detailed performance analysis of the blind source separation based I/Q corrector operating at the baseband. Performance of the digital I/Q corrector is evaluated not only under time-varying phase and gain errors but also in the presence of multipath and Rayleigh fading channels. Performance under low-SNR and different modulation formats and constellation sizes is also evaluated. What is more, BER improvement after correction is illustrated. The results indicate that the adaptive algorithm offers adequate performance for most communication applications hence, reducing the matching requirements of the analog front-end enabling higher levels of integration.

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This paper explores the benefits of compensating transmitter gain and phase inbalances in the receiver for quadrature communication systems. It is assumed that the gain and phase imbalances are introduced at the transmitter only. A simple non-data aided DSP algorithm is used at the reciever to compensate for the imbalances. Computer simulation has been formed to study a coherent QPSK communication system.

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In this paper digital part of a self-calibrating quadrature-receiver is described, containing a digital calibration-engine. The blind source-separation-based calibration-engine eliminates the RF-impairments in real-time hence improving the receiver's performance without the need for test/pilot tones, trimming or use of power-hungry discrete components. Furthermore, an efficient time-multiplexed calibration-engine architecture is proposed and implemented on an FPGA utilising a reduced-range multiplier structure. The use of reduced-range multipliers results in substantial reduction of area as well as power consumption without a compromise in performance when compared with an efficiently designed general purpose multiplier. The performance of the calibration-engine does not depend on the modulation format or the constellation size of the received signal; hence it can be easily integrated into the digital signal processing paths of any receiver.

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This paper deals with and details the design and implementation of a low-power; hardware-efficient adaptive self-calibrating image rejection receiver based on blind-source-separation that alleviates the RF analog front-end impairments. Hybrid strength-reduced and re-scheduled data-flow, low-power implementation of the adaptive self-calibration algorithm is developed and its efficiency is demonstrated through simulation case studies. A behavioral and structural model is developed in Matlab as well as a low-level architectural design in VHDL providing valuable test benches for the performance measures undertaken on the detailed algorithms and structures.

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This paper deals with and details the design of a power-aware adaptive digital image rejection receiver based on blind-source-separation that alleviates the RF analog front-end impairments. Power-aware system design at the RTL level without having to redesign arithmetic circuits is used to reduce the power consumption in nomadic devices. Power-aware multipliers with configurable precision are used to trade-off the image-rejection-ratio (IRR) performance with power consumption. Results of the simulation case studies demonstrate that the IRR performance of the power-aware system is comparable to that of the normal implementation albeit degraded slightly, but well within the acceptable limits.

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This paper presents the design and implementation of a dual–tracking Radio Frequency (RF) front–end for a multi–constellation Global Navigation Satellite Systems (GNSS) receiver. The RF frond–end is based on the direct RF conversion architecture, which employs sub–Nyquist sampling (also known as subsampling) at RF. The dual–tracking RF front–end is composed of a few RF components that are duplicated to form the two RF channels. Employing a dual–channel Analogue–to–Digital Converter (ADC) enables synchronisation of the RF channels and minimises the errors resulting from the differences in the satellite clocks and the propagation delay between the two RF channels. The digitised GNSS signals are processed by two separate acquisition and tracking engines that are driven by the front–end’s master clock. This setup provides two synchronised receivers that are integrated onto one piece of hardware. The hardware is intended to be used for research applications such as multipath mitigation, scintillation assessment, and advanced satellite clock and spatial frame transformation modelling.

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This paper demonstrates nonlinear phase filtering effects on GNSS receiver accuracy. Using a nonlinear phase filter in a GNSS receiver can change the pseudorange estimation up to 250 metres which introduces an error in the overall positioning calculation. Paper shows the study of the nonlinear phase filtering effects on the pseudorange estimation and demonstrates how it can be compensated with minimal hardware usage.

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This work addresses the joint compensation of IQimbalances and carrier phase synchronization errors of zero- IF receivers. The compensation scheme based on blind-source separation which provides simple yet potent means to jointly compensate for these errors independent of modulation format and constellation size used. The low-complexity of the algorithm makes it a suitable option for real-time deployment as well as practical for integration into monolithic receiver designs.

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I and Q Channel phase and gain mismatches are of great concern in communications receiver design. In this paper we carry out a detailed performance analysis of the Blind-Source Seperation (BSS) based imbalance compensation structure. The results indicate that the BSS structure can offer adequate performance for most communication systems. Since the compensation is carried out before any modulation specific processing, the proposed compensation method works with all standard modulation formats.

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Phase and gain mismatches between the I and Q analog signal processing paths of a quadrature receiver are responsible for the generation of image signals which limit the dynamic range of a practical receiver. In this paper we analyse the effects these mismatches and propose a low-complexity blind adaptive algorithm to minimize this problem. The proposed solution is based on two, 2-tap adaptive filters, arranged in Adaptive Noise Canceller (ANC) set-up. The algorithm lends itself to efficient real-time implementation with minimal increase in modulator complexity.

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I and Q Channel phase and gain misniatches are of great concern in communications receiver design. In this paper we analyse the effects of I and Q channel mismatches and propose a low-complexity blind adaptive algorithm to minimize this problem. The proposed solution consists of two, 2-tap adaptive filters, arranged in Adaptive Noise Canceller (ANC) set-up, with the output of one cross-fed to the input of the other. The system works as a de-correlator eliminating I and Q mismatch errors.

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The study of knowledge transfer (KT) has been proceeding in parallel but independently in health services and in business, presenting an opportunity for synergy and sharing. This paper uses a survey of 32 empirical KT studies with their 96 uniquely named determinants of KT success to identify ten unique determinants for horizontal knowledge transfer success. These determinants, the outcome measure of Knowledge Use, and separate explicit and tacit transfer flows constitute the KT Framework, extending the work of previous KT framework authors. Our Framework was validated through a case study of the transfer of clinical practice guideline knowledge between the cardiac teams of selected Ontario hospitals, using a survey of senders and receivers developed from the KT literature. The study findings were: 8 of 10 determinants were supported by the Successful Transfer Hospitals; and 4 of 10 determinants were found to a higher degree in the Successful than non-Successful transfer hospitals. Taken together, the results show substantive support for the KT Framework determinants, indicating aggregate support of 9 of these determinants, but not the 10th - Knowledge Complexity. The transfer of tacit knowledge was found to be related to the transfer of the explicit knowledge and expressed as the transfer or recreation of resource profile and internal process tacit knowledge, where this tacit transfer did not require interactions between Sender and Receiver. This study provides managers with the building blocks to assess and improve the success rates of their knowledge transfers.

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Global navigation satellite system (GNSS) receivers require solutions that are compact, cheap and low-power, in order to enable their widespread proliferation into consumer products. Furthermore, interoperability of GNSS with non-navigation systems, especially communication systems will gain importance in providing the value added services in a variety of sectors, providing seamless quality of service for users. An important step into the market for Galileo is the timely availability of these hybrid multi-mode terminals for consumer applications. However, receiver architectures that are amenable to high-levels of integration will inevitably suffer from RF impairments hindering their easy widespread use in commercial products. This paper studies and presents analytical evaluations of the performance degradation due to the RF impairments and develops algorithms that can compensate for them in the DSP domain at the base band with complexity-reduced hardware overheads, hence, paving the way for low-power, highly integrated multi-mode GNSS receivers.

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Next generation Global Navigation Satellite System (GNSS) receivers will operate in multiple navigation bands. An efficient way to achieve this with lower power and cost is to employ BandPass Sampling (BPS); nevertheless, the sampling operation injects large amounts of jitter noise, which degrades the performance of the receiver. Continuous–Time (CT) Delta–Sigma (ΔΣ) modulators are capable of suppressing this noise but the impact of clock jitter at the output of the Digital– to–Analog Converter (DAC) in the feedback path of the modulator should be taken into account. This paper presents an analytical approach for describing clock jitter in GNSS receivers when a CT–ΔΣ modulator is utilized for Analog–to–Digital Conversion (ADC). The validity of the presented approach is verified through time–domain simulations using a behavioural model of the fourth–order CT–ΔΣ modulator with 1–bit NRZ DAC feedback pulse.