Parallel pipelined histogram architecture via C-slow retiming

A parallel pipelined array of cells suitable for realtime computation of histograms is proposed. The cell architecture builds on previous work to now allow operating on a stream of data at 1 pixel per clock cycle. This new cell is more suitable for interfacing to camera sensors or to microprocessors of 8-bit data buses which are common in consumer digital cameras. Arrays using the new proposed cells are obtained via C-slow retiming techniques and can be clocked at a 65% faster frequency than previous arrays. This achieves over 80% of the performance of two-pixel per clock cycle parallel pipelined arrays.

Pushed to the Edge: Inclusion and Behaviour Support in Schools

While debates rage about educational inequality and the best way to tackle attainment gaps, a pervasive form of inschool segregation is going largely unremarked upon. Internal behaviour support units have become common fixtures in British schools. Young people may be removed from mainstream classrooms for weeks, months or even years to undergo rehabilitative programmes that incur little monitoring or oversight. This original book is the first to provide a detailed insight into the politics and practices of internal school exclusion, highlighted through the experiences of the young people attending the units. Ambitious in its scope, it draws on intensive ethnographic research with pupils, their teachers and parents to address broad questions around social justice, equal opportunities and institutional racism. It will appeal to students, researchers and practitioners in education, social policy, sociology and beyond.