The effect of clock jitter on the performance of continuous-time delta-sigma ADC for GNSS signals

Next generation Global Navigation Satellite System (GNSS) receivers will operate in multiple navigation bands. An efficient way to achieve this with lower power and cost is to employ BandPass Sampling (BPS); nevertheless, the sampling operation injects large amounts of jitter noise, which degrades the performance of the receiver. Continuous–Time (CT) Delta–Sigma (ΔΣ) modulators are capable of suppressing this noise but the impact of clock jitter at the output of the Digital– to–Analog Converter (DAC) in the feedback path of the modulator should be taken into account. This paper presents an analytical approach for describing clock jitter in GNSS receivers when a CT–ΔΣ modulator is utilized for Analog–to–Digital Conversion (ADC). The validity of the presented approach is verified through time–domain simulations using a behavioural model of the fourth–order CT–ΔΣ modulator with 1–bit NRZ DAC feedback pulse.

Forecasting overseas visitors into the United Kingdom using continuous time and autoregressive fractional integrated moving average models with discrete data

This paper applies Gaussian estimation methods to continuous time models for modelling overseas visitors into the UK. The use of continuous time modelling is widely used in economics and finance but not in tourism forecasting. Using monthly data for 1986–2010, various continuous time models are estimated and compared to autoregressive integrated moving average (ARIMA) and autoregressive fractionally integrated moving average (ARFIMA) models. Dynamic forecasts are obtained over different periods. The empirical results show that the ARIMA model performs very well, but that the constant elasticity of variance (CEV) continuous time model has the lowest root mean squared error (RMSE) over a short period.

An FPGA based decimation filter processor design for real-time continuous-time Σ−Δ modulator performance measurement and evaluation

This paper reports on a Field Programmable Gate Array (FPGA) implementation as well as prototyping for real-time testing of a low complexity high efficiency decimation filter processor which is deployed in conjunction with a custom built low-power jitter insensitive Continuous Time (CT) Sigma-Delta (Σ-Δ) Modulator to measure and assess its performance. The CT Σ-Δ modulator/decimation filter cascade can be used in integrated all-digital microphone interfaces for a variety of applications including mobile phone handsets, wireless handsets as well as other applications requiring all-digital microphones. The work reported here concentrates on the design and implementation as well as prototyping on a Xilinx Spartan 3 FPGA development system and real-time testing of the decimation processing part deploying All-Pass based structures to process the bit stream coming from CT Σ-Δ modulator hence measuring in real-time and fully assessing the modulator's performance.

A Novel Sub-Nyquist Fourier Transform Estimator Based on Alias-free Hybrid Stratified Sampling

This paper introduces a novel method of estimating theFourier transform of deterministic continuous-time signals from a finite number N of their nonuniformly spaced measurements. These samples, located at a mixture of deterministic and random time instants, are collected at sub-Nyquist rates since no constraints are imposed on either the bandwidth or the spectral support of the processed signal. It is shown that the proposed estimation approach converges uniformly for all frequencies at the rate N^−5 or faster. This implies that it significantly outperforms its alias-free-sampling-based predecessors, namely stratified and antithetical stratified estimates, which are shown to uniformly convergence at a rate of N^−1. Simulations are presented to demonstrate the superior performance and low complexity of the introduced technique.

Genetic programming for the minimum time swing up and balance control acrobot problem

This work describes how genetic programming is applied to evolving controllers for the minimum time swing up and inverted balance tasks of the continuous state and action: limited torque acrobot. The best swing-up controller is able to swing the acrobot up to a position very close to the inverted ‘handstand’ position in a very short time, shorter than that of Coulom (2004), who applied the same constraints on the applied torque values, and to take only slightly longer than the approach by Lai et al. (2009) where far larger torque values were allowed. The best balance controller is able to balance the acrobot in the inverted position when starting from the balance position for the length of time used in the fitness function in all runs; furthermore, 47 out of 50 of the runs evolve controllers able to maintain the balance position for an extended period, an improvement on the balance controllers generated by Dracopoulos and Nichols (2012), which this paper is extended from. The most successful balance controller is also able to balance the acrobot when starting from a small offset from the balance position for this extended period.