The Use of Almost Linear Phase IIR filters In DFT Modulated Filter Banks for Communication Systems

This paper is on the use and performance of M-path polyphase Infinite Impulse Response (IIR) filters for channelisation, conventionally where Finite Impulse Response (FIR) filters are preferred. This paper specifically focuses on the Discrete Fourier Transform (DFT) modulated filter banks, which are known to be an efficient choice for channelisation in communication systems. In this paper, the low-pass prototype filter for the DFT filter bank has been implemented using an M-path polyphase IIR filter and we show that the spikes present at the stopband can be avoided by making use of the guardbands between narrowband channels. It will be shown that the channelisation performance will not be affected when polyphase IIR filters are employed instead of their counterparts derived from FIR prototype filters. Detailed complexity and performance analysis of the proposed use will be given in this article.

Miniaturised sharp rejection bandpass filter with reconfigurable bandwidth for UWB applications

A novel, compact and highly selective microstrip bandpass filter with bandwidth reconfigurability for ultra-wideband (UWB) applications is presented. The proposed design uses stepped impedance resonator (SIR) for realization of bandpass filter (BPF) and employs a single varactor diode (BB135-NXP) for the purpose of reconfiguring bandwidth. Additionally, to improve the selectivity between passband edges, a cross-coupling between I/O feed lines is introduced which generated pairs of attenuation poles at each side of the passband. Measurements on a fabricated reconfigurable filter confirm the accuracy of the design procedure. Measured responses show good agreement with simulation. The proposed filter is able to achieve significant size reduction (8.5 mm × 7.1 mm excluding the feeding ports) as compared to the conventional bandpass filters with reconfigurable bandwidth.

Cross-Industry Product Diversification and Contagion in Risk and Return: The Case of Bank-Insurance and Insurance-Bank Takeovers

We investigate the impact of domestic/international bancassurance deals on the risk-return profiles of announcing and non-announcing banks and insurers within a GARCH model. Bank-insurance deals produce intra- and inter-industry contagion in both risk and return, with larger deals producing greater contagion. Bidder banks and peers experience positive abnormal returns, with the effects on insurer peers being stronger than those on bank peers. Insurance-bank deals produce insignificant excess returns for bidder and peer insurers and positive valuations for peer banks. Following the deal, the bank bidders’ idiosyncratic (systematic) risk falls (increases), while insurance bidders exhibit a lower systematic risk and maintain their idiosyncratic risk.

Diversification, size and risk: The case of bank acquisitions of nonbank financial firms

We investigate the risk effects of bank acquisitions of insurance companies and securities firms between 1991 and 2012 using a newly constructed dataset of M&A deals. We examine risk changes before and after deal announcements by decomposing risk into systematic and idiosyncratic components. Subsequently, we investigate the relationship between risk and diversification by modelling the determinants of risks. We find that bank combinations with securities firms yield higher risks than combinations with insurance companies. Bank size is an important and consistent determinant of risk whereas diversification is not. Our results inform the continuing debate on diversification versus functional separation of bank activities.

Self-help, Saving and Suburbanisation - the Birkbeck Freehold Land and Building Societies, their Bank and the London Mechanics’ Institute 1851 – 1911.

The Birkbeck Freehold Land and Building Societies were launched in 1851 in the London Mechanics’ Institute, secured its survival, and eventually replaced its premises with the architectural ‘phantasmagoria’ of the Birkbeck Bank. Prior to its collapse in 1911 ‘the Birkbeck’ was a major element in the English property based financial system and contributed significantly to the suburban growth of London. The Institute, Societies and Bank shared a Utilitarian vision of social progress through self-help that was at times hotly contested by the radical champions of the social classes that they were initially formed to assist. Their parallel histories are attested today by ‘Birkbeck’ toponyms (including roads, pubs and a railway station) in the London landscape.

Median Filter Architecture by Accumulative Parallel Counters

The time to process each of the W/B processing blocks of a median calculation method on a set of N W-bit integers is improved here by a factor of three compared with literature. The parallelism uncovered in blocks containing B-bit slices is exploited by independent accumulative parallel counters so that the median is calculated faster than any known previous method for any N, W values. The improvements to the method are discussed in the context of calculating the median for a moving set of N integers, for which a pipelined architecture is developed. An extra benefit of a smaller area for the architecture is also reported.

An FPGA based decimation filter processor design for real-time continuous-time Σ−Δ modulator performance measurement and evaluation

This paper reports on a Field Programmable Gate Array (FPGA) implementation as well as prototyping for real-time testing of a low complexity high efficiency decimation filter processor which is deployed in conjunction with a custom built low-power jitter insensitive Continuous Time (CT) Sigma-Delta (Σ-Δ) Modulator to measure and assess its performance. The CT Σ-Δ modulator/decimation filter cascade can be used in integrated all-digital microphone interfaces for a variety of applications including mobile phone handsets, wireless handsets as well as other applications requiring all-digital microphones. The work reported here concentrates on the design and implementation as well as prototyping on a Xilinx Spartan 3 FPGA development system and real-time testing of the decimation processing part deploying All-Pass based structures to process the bit stream coming from CT Σ-Δ modulator hence measuring in real-time and fully assessing the modulator's performance.