Parallel pipelined histogram architecture via C-slow retiming

A parallel pipelined array of cells suitable for realtime computation of histograms is proposed. The cell architecture builds on previous work to now allow operating on a stream of data at 1 pixel per clock cycle. This new cell is more suitable for interfacing to camera sensors or to microprocessors of 8-bit data buses which are common in consumer digital cameras. Arrays using the new proposed cells are obtained via C-slow retiming techniques and can be clocked at a 65% faster frequency than previous arrays. This achieves over 80% of the performance of two-pixel per clock cycle parallel pipelined arrays.

Heterogeneous Agglomeration

Many prior treatments of agglomeration explicitly or implicitly assume that all industries agglomerate for the same reasons. This paper uses UK establishment-level coagglomeration data to document substantial heterogeneity across industries in the microfoundations of agglomeration economies. It finds robust evidence of organizational and adaptive agglomeration forces as discussed by Chinitz (1961), Vernon (1960), and Jacobs (1969). These forces interact with the traditional Marshallian (1890) factors of input sharing, labor pooling, and knowledge spillovers, establishing a previously unrecognized complementarity between the approaches of Marshall and Jacobs, as well as others, to the analysis of agglomeration.