Twentieth Century Modern Architecture and the Countryside: Ludwig Mies van der Rohe's design for a country gold clubhouse for the Krefeld Golf Club Association

This paper investigates relationships between modernity and monumentality in the architecture of Ludwig Mies van der Rohe. In his Modern Architecture, the critic and historian Kenneth Frampton separated Mies’ work into two historical periods, 1921-1933 and 1933-1967; the first he entitled ‘Mies van der Rohe and the significance of fact,’ the second ‘Mies van der Rohe and the monumentalisation of technique.’ The two historical periods correspond to two different geopolitical phases of Mies’ career, the first in Weimar Germany the second in the United States. By looking at a number of designs and texts made by Mies in the 1930’s and 1940’s, this essay questions the validity of separating Mies’ architecture into such clear-cut categories, where each one can enjoy a seeming independence from the other. The fulcrum for the discussion is Mies’ design of 1930 for a country golf clubhouse for the industrial town of Krefeld in north-western Germany. Our attention to the golf clubhouse design was prompted by the recent installation (2013), in which a 1-1 model of the design, made primarily from plywood, was erected in a field close the the site of Mies' original proposal.

An FPGA based decimation filter processor design for real-time continuous-time Σ−Δ modulator performance measurement and evaluation

This paper reports on a Field Programmable Gate Array (FPGA) implementation as well as prototyping for real-time testing of a low complexity high efficiency decimation filter processor which is deployed in conjunction with a custom built low-power jitter insensitive Continuous Time (CT) Sigma-Delta (Σ-Δ) Modulator to measure and assess its performance. The CT Σ-Δ modulator/decimation filter cascade can be used in integrated all-digital microphone interfaces for a variety of applications including mobile phone handsets, wireless handsets as well as other applications requiring all-digital microphones. The work reported here concentrates on the design and implementation as well as prototyping on a Xilinx Spartan 3 FPGA development system and real-time testing of the decimation processing part deploying All-Pass based structures to process the bit stream coming from CT Σ-Δ modulator hence measuring in real-time and fully assessing the modulator's performance.