Evidence of Intracrystalline Mesostructured Porosity in Zeolites by Advanced Gas Sorption, Electron Tomography and Rotation Electron Diffraction

The small size of micropores (typically <1 nm) in zeolites causes slow diffusion of reactant and product molecules in and out of the pores and negatively impacts the product selectivity of zeolite based catalysts, for example, fluid catalytic cracking (FCC) catalysts. Size-tailored mesoporosity was introduced into commercial zeolite Y crystals by a simple surfactant-templating post-synthetic mesostructuring process. The resulting mesoporous zeolite Y showed significantly improved product selectivity in both laboratory testing and refinery trials. Advanced characterization techniques such as electron tomography, three-dimensional rotation electron diffraction, and high resolution gas adsorption coupled with hysteresis scanning and density functional theory, unambiguously revealed the intracystalline nature and connectivity of the introduced mesopores. They can be considered as molecular highways that help reactant and product molecules diffuse quickly to and away from the catalytically active sites within the zeolite crystals and, thus, shift the selectivity to favor the production of more of the valuable liquid fuels at reduced yields of coke and unconverted feed.

A parallel method for impulsive image noise removal on hybrid CPU/GPU systems

A parallel algorithm for image noise removal is proposed. The algorithm is based on peer group concept and uses a fuzzy metric. An optimization study on the use of the CUDA platform to remove impulsive noise using this algorithm is presented. Moreover, an implementation of the algorithm on multi-core platforms using OpenMP is presented. Performance is evaluated in terms of execution time and a comparison of the implementation parallelised in multi-core, GPUs and the combination of both is conducted. A performance analysis with large images is conducted in order to identify the amount of pixels to allocate in the CPU and GPU. The observed time shows that both devices must have work to do, leaving the most to the GPU. Results show that parallel implementations of denoising filters on GPUs and multi-cores are very advisable, and they open the door to use such algorithms for real-time processing.

The information systems integration for a better caring and chronic patients´ empowerment

The technology innovation (TI) in the health system has been confirmed as the best format to share information and to facilitate the communication between all the actors involved in the chronic patients´ care.

Selective SWIFT-R. A Flexible Software-Based Technique for Soft Error Mitigation in Low-Cost Embedded Systems

Commercial off-the-shelf microprocessors are the core of low-cost embedded systems due to their programmability and cost-effectiveness. Recent advances in electronic technologies have allowed remarkable improvements in their performance. However, they have also made microprocessors more susceptible to transient faults induced by radiation. These non-destructive events (soft errors), may cause a microprocessor to produce a wrong computation result or lose control of a system with catastrophic consequences. Therefore, soft error mitigation has become a compulsory requirement for an increasing number of applications, which operate from the space to the ground level. In this context, this paper uses the concept of selective hardening, which is aimed to design reduced-overhead and flexible mitigation techniques. Following this concept, a novel flexible version of the software-based fault recovery technique known as SWIFT-R is proposed. Our approach makes possible to select different registers subsets from the microprocessor register file to be protected on software. Thus, design space is enriched with a wide spectrum of new partially protected versions, which offer more flexibility to designers. This permits to find the best trade-offs between performance, code size, and fault coverage. Three case studies have been developed to show the applicability and flexibility of the proposal.

Fault tolerant embedded systems design by multi-objective optimization

The design of fault tolerant systems is gaining importance in large domains of embedded applications where design constrains are as important as reliability. New software techniques, based on selective application of redundancy, have shown remarkable fault coverage with reduced costs and overheads. However, the large number of different solutions provided by these techniques, and the costly process to assess their reliability, make the design space exploration a very difficult and time-consuming task. This paper proposes the integration of a multi-objective optimization tool with a software hardening environment to perform an automatic design space exploration in the search for the best trade-offs between reliability, cost, and performance. The first tool is commanded by a genetic algorithm which can simultaneously fulfill many design goals thanks to the use of the NSGA-II multi-objective algorithm. The second is a compiler-based infrastructure that automatically produces selective protected (hardened) versions of the software and generates accurate overhead reports and fault coverage estimations. The advantages of our proposal are illustrated by means of a complex and detailed case study involving a typical embedded application, the AES (Advanced Encryption Standard).