3 resultados para value-adding

em University of Queensland eSpace - Australia


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Queensland, Australia, has a proud pastoral history; however, the private and social benefits of continued woodland clearing for pasture development are unlikely to be as pronounced as they had been in the past. The environmental benefits of tree retention in and regions of the State are now better appreciated and market opportunities have arisen for the unique timbers of western Queensland. A financial model is developed to facilitate a comparison of the private profitability of small-scale timber production from remnant Acacia woodlands against clearing for pasture development in the Mulga Lands and Desert Uplands bioregions of western Queensland. Four small-scale timber production scenarios, which differ in target markets and the extent of processing (value-adding), are explored within the model. Each scenario is examined for the cases where property rights to the timber are vested with the timber processor, and where royalties are payable. For both cases of resource ownership, at least one scenario generates positive returns from timber production, and exceeds the net farm income per hectare for an average grazing property in the study regions over the period 1989-1990 to 2000-2001. The net present value per hectare of selectively harvesting and processing high-value clearwood from remnant western Queensland woodlands is found to be greater than clearing for grazing. (C) 2003 Elsevier B.V. All rights reserved.

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This paper explores potential for the RAMpage memory hierarchy to use a microkernel with a small memory footprint, in a specialized cache-speed static RAM (tightly-coupled memory, TCM). Dreamy memory is DRAM kept in low-power mode, unless referenced. Simulations show that a small microkernel suits RAMpage well, in that it achieves significantly better speed and energy gains than a standard hierarchy from adding TCM. RAMpage, in its best 128KB L2 case, gained 11% speed using TCM, and reduced energy 14%. Equivalent conventional hierarchy gains were under 1%. While 1MB L2 was significantly faster against lower-energy cases for the smaller L2, the larger SRAM's energy does not justify the speed gain. Using a 128KB L2 cache in a conventional architecture resulted in a best-case overall run time of 2.58s, compared with the best dreamy mode run time (RAMpage without context switches on misses) of 3.34s, a speed penalty of 29%. Energy in the fastest 128KB L2 case was 2.18J vs. 1.50J, a reduction of 31%. The same RAMpage configuration without dreamy mode took 2.83s as simulated, and used 2.39J, an acceptable trade-off (penalty under 10%) for being able to switch easily to a lower-energy mode.