29 resultados para insulated-gate bipolar transistors (IGBTs)

em University of Queensland eSpace - Australia


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Age of onset is an important variable when considering the cause and course of mental illnesses. Given the debate about the relationship between psychotic disorders it would be useful to compare age-at-first-admission for ICD schizophrenia and for affective psychoses when the latter is differentiated into 'major depression' and 'bipolar disorder'. Data on age-at-first-admission for Australian-born individuals diagnosed with schizophrenia (ICD 295) or affective psychosis (ICD 296) were extracted from the Queensland Mental Health Statistics System -- a comprehensive, namelinked mental health register. Because the ICD 9 category 296.1 was used to code what is now called "major depressive episode', this group was differentiated from other 296 categorieswhich were considered bipolar disorders. Those receiving more than one diagnoses within these categories were excluded. All distributions show a wide age range of onset from early adolescence into the seventies and eighties. However the modal age-group for major depression ('60-69' for both sexes) is clearly different from bipolar disorder ('20-29' for males; '30- 39' for females), the latter distribution being more similar to the SCZ distribution (which had a model age-group of '20-29' for both sexes). While these distributions were similar for males and females, there were sex differences in the proportions within each diagnostic group: more males with schizophrenia, and more females with bipolar disorder and with major depression. Our results suggest heterogeneity within the affective psychoses as categorised by ICD 9, with bipolar disorder having an age-at-first-admission distribution more similar to schizophrenia than major depression. The Stanley Foundation supported this project.

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We present a novel method of performing quantum logic gates in trapped ion quantum computers which does not require the ions to be cooled down to the ground state of their vibrational modes, thereby avoiding one of the principal experimental difficulties encountered in realizing this technology. Our scheme employs adiabatic passages and a phase shift conditional on the phonon number state.

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We present a method for measuring single spins embedded in a solid by probing two-electron systems with a single-electron transistor (SET). Restrictions imposed by the Pauli principle on allowed two-electron states mean that the spin state of such systems has a profound impact on the orbital states (positions) of the electrons, a parameter which SET's are extremely well suited to measure. We focus on a particular system capable of being fabricated with current technology: a Te double donor in Si adjacent to a Si/SiO2, interface and lying directly beneath the SET island electrode, and we outline a measurement strategy capable of resolving single-electron and nuclear spins in this system. We discuss the limitations of the measurement imposed by spin scattering arising from fluctuations emanating from the SET and from lattice phonons. We conclude that measurement of single spins, a necessary requirement for several proposed quantum computer architectures, is feasible in Si using this strategy.

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We demonstrate complete characterization of a two-qubit entangling process-a linear optics controlled-NOT gate operating with coincident detection-by quantum process tomography. We use a maximum-likelihood estimation to convert the experimental data into a physical process matrix. The process matrix allows an accurate prediction of the operation of the gate for arbitrary input states and a calculation of gate performance measures such as the average gate fidelity, average purity, and entangling capability of our gate, which are 0.90, 0.83, and 0.73, respectively.

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The use of gate-to-drain capacitance (C-gd) measurement as a tool to characterize hot-carrier-induced charge centers in submicron n- and p-MOSFET's has been reviewed and demonstrated. By analyzing the change in C-gd measured at room and cryogenic temperature before and after high gate-to-drain transverse field (high field) and maximum substrate current (I-bmax) stress, it is concluded that the degradation was found to be mostly due to trapping of majority carriers and generation of interface states. These interface states were found to be acceptor states at top half of band gap for n-MOSFETs and donor states at bottom half of band gap for p-MOSFETs. In general, hot electrons are more likely to be trapped in gate oxide as compared to hot holes while the presence of hot holes generates more interface states. Also, we have demonstrated a new method for extracting the spatial distribution of oxide trapped charge, Q(ot), through gate-to-substrate capacitance (C-gb) measurement. This method is simple to implement and does not require additional information from simulation or detailed knowledge of the device's structure. (C) 2001 Elsevier Science Ltd. All rights reserved.

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A new method to extract MOSFET's threshold voltage VT by measurement of the gate-to-substrate capacitance C-gb of the transistor is presented. Unlike existing extraction methods based on I-V data, the measurement of C-gb does not require de drain current to now between drain and source thus eliminating the effects of source and drain series resistance R-S/D, and at the same time, retains a symmetrical potential profile across the channel. Experimental and simulation results on devices with different sizes are presented to justify the proposed method.

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We consider the possibility that the electrons injected into organic field-effect transistors are strongly correlated. A single layer of acenes can be modeled by a Hubbard Hamiltonian similar to that used for the κ-(BEDT-TTF)2X family of organic superconductors. The injected electrons do not necessarily undergo a transition to a Mott insulator state as they would in bulk crystals when the system is half-filled. We calculate the fillings needed for obtaining insulating states in the framework of the slave-boson theory and in the limit of large Hubbard repulsion U. We also suggest that these Mott states are unstable above some critical interlayer coupling or long-range Coulomb interaction.

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Which gates are universal for quantum computation? Although it is well known that certain gates on two-level quantum systems (qubits), such as the controlled-NOT, are universal when assisted by arbitrary one-qubit gates, it has only recently become clear precisely what class of two-qubit gates is universal in this sense. We present an elementary proof that any entangling two-qubit gate is universal for quantum computation, when assisted by one-qubit gates. A proof of this result for systems of arbitrary finite dimension has been provided by Brylinski and Brylinski; however, their proof relies on a long argument using advanced mathematics. In contrast, our proof provides a simple constructive procedure which is close to optimal and experimentally practical.

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This Letter presents a simple formula for the average fidelity between a unitary quantum gate and a general quantum operation on a qudit, generalizing the formula for qubits found by Bowdrey et al. [Phys. Lett. A 294 (2002) 258]. This formula may be useful for experimental determination of average gate fidelity. We also give a simplified proof of a formula due to Horodecki et al. [Phys. Rev. A 60 (1999) 1888], connecting average gate fidelity to entanglement fidelity. (C) 2002 Elsevier Science B.V. All rights reserved.

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