Quantum controlled-NOT gate with 'hot' trapped ions

We present a novel method of performing quantum logic gates in trapped ion quantum computers which does not require the ions to be cooled down to the ground state of their vibrational modes, thereby avoiding one of the principal experimental difficulties encountered in realizing this technology. Our scheme employs adiabatic passages and a phase shift conditional on the phonon number state.

Effects of hot intrusions on pore-fluid flow and heat transfer in fluid-saturated rocks

We use the finite element method to solve coupled problems between pore-fluid flow and heat transfer in fluid-saturated porous rocks. In particular, we investigate the effects of both the hot pluton intrusion and topographically driven horizontal flow on the distributions of the pore-flow velocity and temperature in large-scale hydrothermal systems. Since general mineralization patterns are strongly dependent on distributions of both the pore-fluid velocity and temperature fields, the modern mineralization theory has been used to predict the general mineralization patterns in several realistic hydrothermal systems. The related numerical results have demonstrated that: (1) The existence of a hot intrusion can cause an increase in the maximum value of the pore-fluid velocity in the hydrothermal system. (2) The permeability of an intruded pluton is one of the sensitive parameters to control the pore-fluid flow, heat transfer and ore body formation in hydrothermal systems. (3) The maximum value of the pore-fluid velocity increases when the bottom temperature of the hydrothermal system is increased. (4) The topographically driven flow has significant effects on the pore-fluid flow, temperature distribution and precipitation pattern of minerals in hydrothermal systems. (5) The size of the computational domain may have some effects on the pore-fluid flow and heat transfer, indicating that the size of a hydrothermal system may affect the pore-fluid flow and heat transfer within the system. (C) 2003 Elsevier Science B.V. All rights reserved.

Analysis of the gate capacitance measurement technique and its application for the evaluation of hot-carrier degradation in submicrometer MOSFETs

The use of gate-to-drain capacitance (C-gd) measurement as a tool to characterize hot-carrier-induced charge centers in submicron n- and p-MOSFET's has been reviewed and demonstrated. By analyzing the change in C-gd measured at room and cryogenic temperature before and after high gate-to-drain transverse field (high field) and maximum substrate current (I-bmax) stress, it is concluded that the degradation was found to be mostly due to trapping of majority carriers and generation of interface states. These interface states were found to be acceptor states at top half of band gap for n-MOSFETs and donor states at bottom half of band gap for p-MOSFETs. In general, hot electrons are more likely to be trapped in gate oxide as compared to hot holes while the presence of hot holes generates more interface states. Also, we have demonstrated a new method for extracting the spatial distribution of oxide trapped charge, Q(ot), through gate-to-substrate capacitance (C-gb) measurement. This method is simple to implement and does not require additional information from simulation or detailed knowledge of the device's structure. (C) 2001 Elsevier Science Ltd. All rights reserved.