The value of a small microkernel for dreamy memory and the RAMpage memory hierarchy

This paper explores potential for the RAMpage memory hierarchy to use a microkernel with a small memory footprint, in a specialized cache-speed static RAM (tightly-coupled memory, TCM). Dreamy memory is DRAM kept in low-power mode, unless referenced. Simulations show that a small microkernel suits RAMpage well, in that it achieves significantly better speed and energy gains than a standard hierarchy from adding TCM. RAMpage, in its best 128KB L2 case, gained 11% speed using TCM, and reduced energy 14%. Equivalent conventional hierarchy gains were under 1%. While 1MB L2 was significantly faster against lower-energy cases for the smaller L2, the larger SRAM's energy does not justify the speed gain. Using a 128KB L2 cache in a conventional architecture resulted in a best-case overall run time of 2.58s, compared with the best dreamy mode run time (RAMpage without context switches on misses) of 3.34s, a speed penalty of 29%. Energy in the fastest 128KB L2 case was 2.18J vs. 1.50J, a reduction of 31%. The same RAMpage configuration without dreamy mode took 2.83s as simulated, and used 2.39J, an acceptable trade-off (penalty under 10%) for being able to switch easily to a lower-energy mode.

Multiagent realization of prediction-based diagnosis and loss prevention

A multiagent diagnostic system implemented in a Protege-JADE-JESS environment interfaced with a dynamic simulator and database services is described in this paper. The proposed system architecture enables the use of a combination of diagnostic methods from heterogeneous knowledge sources. The process ontology and the process agents are designed based on the structure of the process system, while the diagnostic agents implement the applied diagnostic methods. A specific completeness coordinator agent is implemented to coordinate the diagnostic agents based on different methods. The system is demonstrated on a case study for diagnosis of faults in a granulation process based on HAZOP and FMEA analysis.

An FPGA network architecture for accelerating 3DES - CBC

This paper presents a DES/3DES core that will support cipher block chaining (CBC) and also has a built in keygen that together take up about 10% of the resources in a Xilinx Virtex II 1000-4. The core will achieve up to 200Mbit/s of encryption or decryption. Also presented is a network architecture that will allow these CBC capable 3DES cores to perform their processing in parallel.

UQ RoboRoos: Achieving power and agility in a small size robot

The UQ RoboRoos have been developed to participate in the RoboCup robot soccer small size league over several years. RoboCup 2001 saw a focus on the mechanical design of the RoboRoos, with the introduction of an omni-directional drive system and a high power kicker. The change in mechanical design had implications for the rest of the system particularly navigation and multi-robot planning. In addition, the overhead vision system was upgraded to improve reliability and robustness.

COMMAD 04 proceedings

The following topics were dealt with: semiconductor growth (MBE, PECVD, MOCVD, MOVPE) and characterizations; high-electron mobility transistors (HEMTs); microcavity organic light emitting diode (MOLED); semiconductor superlattices; photodiode arrays; MEMS structures; lithography;semiconductor lasers; semiconductor optical amplifiers; surface treatment and annealing