Vaness: DNS for nomadic users in vehicular networks

Vehicular networks, also known as VANETs, are an ad-hoc network formed by vehicles and road-side units. Nowadays they have been attracting big interest both from researchers as from the automotive industry. With the upcoming of automotive specific operating systems and self-driving cars, the use of applications on vehicles and the integration with common mobile devices is becoming a big part of VANETs. Although many advances have been made on this field, there is still a big discrepancy between the communication layer services provided by VANETs and the user level services, namely those accessible through mobile applications on other networks and technologies. Users and developers are accustomed to user-to-user or user-tobusiness communication without explicit concerns related with the available communication transport layer. Such is not possible in VANETs since people may use more than one vehicle. However, to send a message to a specific user in these networks, there is a need to know the ID of the vehicle where the user is, meaning that there is a lack of services that map each individual user to VANETs endpoint (vehicle identification). This dissertation work proposes VANESS, a naming service as a resource to support user-to-user communication within a heterogeneous scenario comprising typical ISP scenario and VANETs focused on mobile devices. The proposed system is able to map the user to an end point either locally (i.e. there is not internet connection at all), online (i.e. system is not in a vehicular network but has direct internet connection) and using a gateway (i.e. the system is in a vehicular network where some of the nodes have internet access and will act as a gateway). VANESS was fully implemented on android OS with results proving his viability, and partially on iOS showing its multiplatform capabilities.

Analysis of multirate behavior in electronic systems

Esta tese insere-se na área da simulação de circuitos de RF e microondas, e visa o estudo de ferramentas computacionais inovadoras que consigam simular, de forma eficiente, circuitos não lineares e muito heterogéneos, contendo uma estrutura combinada de blocos analógicos de RF e de banda base e blocos digitais, a operar em múltiplas escalas de tempo. Os métodos numéricos propostos nesta tese baseiam-se em estratégias multi-dimensionais, as quais usam múltiplas variáveis temporais definidas em domínios de tempo deformados e não deformados, para lidar, de forma eficaz, com as disparidades existentes entre as diversas escalas de tempo. De modo a poder tirar proveito dos diferentes ritmos de evolução temporal existentes entre correntes e tensões com variação muito rápida (variáveis de estado activas) e correntes e tensões com variação lenta (variáveis de estado latentes), são utilizadas algumas técnicas numéricas avançadas para operar dentro dos espaços multi-dimensionais, como, por exemplo, os algoritmos multi-ritmo de Runge-Kutta, ou o método das linhas. São também apresentadas algumas estratégias de partição dos circuitos, as quais permitem dividir um circuito em sub-circuitos de uma forma completamente automática, em função dos ritmos de evolução das suas variáveis de estado. Para problemas acentuadamente não lineares, são propostos vários métodos inovadores de simulação a operar estritamente no domínio do tempo. Para problemas com não linearidades moderadas é proposto um novo método híbrido frequência-tempo, baseado numa combinação entre a integração passo a passo unidimensional e o método seguidor de envolvente com balanço harmónico. O desempenho dos métodos é testado na simulação de alguns exemplos ilustrativos, com resultados bastante promissores. Uma análise comparativa entre os métodos agora propostos e os métodos actualmente existentes para simulação RF, revela ganhos consideráveis em termos de rapidez de computação.

Operating infrastructure for an FPGA and ARM system

Advances in FPGA technology and higher processing capabilities requirements have pushed to the emerge of All Programmable Systems-on-Chip, which incorporate a hard designed processing system and a programmable logic that enable the development of specialized computer systems for a wide range of practical applications, including data and signal processing, high performance computing, embedded systems, among many others. To give place to an infrastructure that is capable of using the benefits of such a reconfigurable system, the main goal of the thesis is to implement an infrastructure composed of hardware, software and network resources, that incorporates the necessary services for the operation, management and interface of peripherals, that coompose the basic building blocks for the execution of applications. The project will be developed using a chip from the Zynq-7000 All Programmable Systems-on-Chip family.