4 resultados para integrity in closed-loop
Resumo:
In this paper we advocate the Loop-of-stencil-reduce pattern as a way to simplify the parallel programming of heterogeneous platforms (multicore+GPUs). Loop-of-Stencil-reduce is general enough to subsume map, reduce, map-reduce, stencil, stencil-reduce, and, crucially, their usage in a loop. It transparently targets (by using OpenCL) combinations of CPU cores and GPUs, and it makes it possible to simplify the deployment of a single stencil computation kernel on different GPUs. The paper discusses the implementation of Loop-of-stencil-reduce within the FastFlow parallel framework, considering a simple iterative data-parallel application as running example (Game of Life) and a highly effective parallel filter for visual data restoration to assess performance. Thanks to the high-level design of the Loop-of-stencil-reduce, it was possible to run the filter seamlessly on a multicore machine, on multi-GPUs, and on both.
Resumo:
We consider a multipair relay channel, where multiple sources communicate with multiple destinations with the help of a full-duplex (FD) relay station (RS). All sources and destinations have a single antenna, while the RS is equipped with massive arrays. We assume that the RS estimates the channels by using training sequences transmitted from sources and destinations. Then, it uses maximum-ratio combining/maximum-ratio transmission (MRC/MRT) to process the signals. To significantly reduce the loop interference (LI) effect, we propose two massive MIMO processing techniques: i) using a massive receive antenna array; or ii) using a massive transmit antenna array together with very low transmit power at the RS. We derive an exact achievable rate in closed-form and evaluate the system spectral efficiency. We show that, by doubling the number of antennas at the RS, the transmit power of each source and of the RS can be reduced by 1.5 dB if the pilot power is equal to the signal power and by 3 dB if the pilot power is kept fixed, while maintaining a given quality-of-service. Furthermore, we compare FD and half-duplex (HD) modes and show that FD improves significantly the performance when the LI level is low.
CTCF modulates Estrogen Receptor function through specific chromatin and nuclear matrix interactions
Resumo:
Enhancer regions and transcription start sites of estrogen-target regulated genes are connected by means of Estrogen Receptor long-range chromatin interactions. Yet, the complete molecular mechanisms controlling the transcriptional output of engaged enhancers and subsequent activation of coding genes remain elusive. Here, we report that CTCF binding to enhancer RNAs is enriched when breast cancer cells are stimulated with estrogen. CTCF binding to enhancer regions results in modulation of estrogen-induced gene transcription by preventing Estrogen Receptor chromatin binding and by hindering the formation of additional enhancer-promoter ER looping. Furthermore, the depletion of CTCF facilitates the expression of target genes associated with cell division and increases the rate of breast cancer cell proliferation. We have also uncovered a genomic network connecting loci enriched in cell cycle regulator genes to nuclear lamina that mediates the CTCF function. The nuclear lamina and chromatin interactions are regulated by estrogen-ER. We have observed that the chromatin loops formed when cells are treated with estrogen establish contacts with the nuclear lamina. Once there, the portion of CTCF associated with the nuclear lamina interacts with enhancer regions, limiting the formation of ER loops and the induction of genes present in the loop. Collectively, our results reveal an important, unanticipated interplay between CTCF and nuclear lamina to control the transcription of ER target genes, which has great implications in the rate of growth of breast cancer cells.
Resumo:
We advocate the Loop-of-stencil-reduce pattern as a means of simplifying the implementation of data-parallel programs on heterogeneous multi-core platforms. Loop-of-stencil-reduce is general enough to subsume map, reduce, map-reduce, stencil, stencil-reduce, and, crucially, their usage in a loop in both data-parallel and streaming applications, or a combination of both. The pattern makes it possible to deploy a single stencil computation kernel on different GPUs. We discuss the implementation of Loop-of-stencil-reduce in FastFlow, a framework for the implementation of applications based on the parallel patterns. Experiments are presented to illustrate the use of Loop-of-stencil-reduce in developing data-parallel kernels running on heterogeneous systems.