2 resultados para core process


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Steroid androgen hormones play a key role in the progression and treatment of prostate cancer, with androgen deprivation therapy being the first-line treatment used to control cancer growth. Here we apply a novel search strategy to identify androgen-regulated cellular pathways that may be clinically important in prostate cancer. Using RNASeq data, we searched for genes that showed reciprocal changes in expression in response to acute androgen stimulation in culture, and androgen deprivation in patients with prostate cancer. Amongst 700 genes displaying reciprocal expression patterns we observed a significant enrichment in the cellular process glycosylation. Of 31 reciprocally-regulated glycosylation enzymes, a set of 8 (GALNT7, ST6GalNAc1, GCNT1, UAP1, PGM3, CSGALNACT1, ST6GAL1 and EDEM3) were significantly up-regulated in clinical prostate carcinoma. Androgen exposure stimulated synthesis of glycan structures downstream of this core set of regulated enzymes including sialyl-Tn (sTn), sialyl Lewis(X) (SLe(X)), O-GlcNAc and chondroitin sulphate, suggesting androgen regulation of the core set of enzymes controls key steps in glycan synthesis. Expression of each of these enzymes also contributed to prostate cancer cell viability. This study identifies glycosylation as a global target for androgen control, and suggests loss of specific glycosylation enzymes might contribute to tumour regression following androgen depletion therapy.

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With security and surveillance, there is an increasing need to process image data efficiently and effectively either at source or in a large data network. Whilst a Field-Programmable Gate Array (FPGA) has been seen as a key technology for enabling this, the design process has been viewed as problematic in terms of the time and effort needed for implementation and verification. The work here proposes a different approach of using optimized FPGA-based soft-core processors which allows the user to exploit the task and data level parallelism to achieve the quality of dedicated FPGA implementations whilst reducing design time. The paper also reports some preliminary
progress on the design flow to program the structure. An implementation for a Histogram of Gradients algorithm is also reported which shows that a performance of 328 fps can be achieved with this design approach, whilst avoiding the long design time, verification and debugging steps associated with conventional FPGA implementations.