Autonomic management of non-functional concerns in distributed & parallel application programming

An approach to the management of non-functional concerns in massively parallel and/or distributed architectures that marries parallel programming patterns with autonomic computing is presented. The necessity and suitability of the adoption of autonomic techniques are evidenced. Issues arising in the implementation of autonomic managers taking care of multiple concerns and of coordination among hierarchies of such autonomic managers are discussed. Experimental results are presented that demonstrate the feasibility of the approach.

Designing computer architecture research workloads

MinneSPEC proposes reduced input sets that microprocessor designers can use to model representative short-running workloads. A four-step methodology verifies the program behavior similarity of these input sets to reference sets.

Enhancing the teaching of professional practice and key skills in engineering through the use of computer animation

This paper presents some observations on how computer animation was used in the early years of a degree program in Electrical and Electronic Engineering to enhance the teaching of key skills and professional practice. This paper presents the results from two case studies. First, in a first year course which seeks to teach students how to manage and report on group projects in a professional way. Secondly, in a technical course on virtual reality, where the students are asked to use computer animation in a way that subliminally coerces them to come to terms with the fine detail of the mathematical principles that underlie 3D graphics, geometry, etc. as well as the most significant principles of computer architecture and software engineering. In addition, the findings reveal that by including a significant element of self and peer review processes into the assessment procedure students became more engaged with the course and achieved a deeper level of comprehension of the material in the course.

Parallel Programming

Recent trends in computing systems, such as multi-core processors and cloud computing, expose tens to thousands of processors to the software. Software developers must respond by introducing parallelism in their software. To obtain highest performance, it is not only necessary to identify parallelism, but also to reason about synchronization between threads and the communication of data from one thread to another. This entry gives an overview on some of the most common abstractions that are used in parallel programming, namely explicit vs. implicit expression of parallelism and shared and distributed memory. Several parallel programming models are reviewed and categorized by means of these abstractions. The pros and cons of parallel programming models from the perspective of performance and programmability are discussed.

Feasibility Assessment of Plug and Play Model Predictive Control for use in DC Grids

Distributed control techniques can allow Transmission System Operators (TSOs) to coordinate their responses via TSO-TSO communication, providing a level of control that lies between that of centralised control and communication free decentralised control of interconnected power systems. Recently the Plug and Play Model Predictive Control (PnPMPC) toolbox has been developed in order to allow practitioners to design distributed controllers based on tube-MPC techniques. In this paper, some initial results using the PnPMPC toolbox for the design of distributed controllers to enhance AGC in AC areas connected to Multi-Terminal HVDC (MTDC) grids, are illustrated, in order to evaluate the feasibility of applying PnPMPC for this purpose.

Fairness Metrics for Multi-Threaded Processors

Multi-threaded processors execute multiple threads concurrently in order to increase overall throughput. It is well documented that multi-threading affects per-thread performance but, more importantly, some threads are affected more than others. This is especially troublesome for multi-programmed workloads. Fairness metrics measure whether all threads are affected equally. However defining equal treatment is not straightforward. Several fairness metrics for multi-threaded processors have been utilized in the literature, although there does not seem to be a consensus on what metric does the best job of measuring fairness. This paper reviews the prevalent fairness metrics and analyzes their main properties. Each metric strikes a different trade-off between fairness in the strict sense and throughput. We categorize the metrics with respect to this property. Based on experimental data for SMT processors, we suggest using the minimum fairness metric in order to balance fairness and throughput.