Packet classification by multi-level cutting of the classification space: An algorithmic-architectural solution for IP packet classification in next generation networks

Traditionally, the Internet provides only a “best-effort” service, treating all packets going to the same destination equally. However, providing differentiated services for different users based on their quality requirements is increasingly becoming a demanding issue. For this, routers need to have the capability to distinguish and isolate traffic belonging to different flows. This ability to determine the flow each packet belongs to is called packet classification. Technology vendors are reluctant to support algorithmic solutions for classification due to their non-deterministic performance. Although CAMs are favoured by technology vendors due to their deterministic high lookup rates, they suffer from the problems of high power dissipation and high silicon cost. This paper provides a new algorithmic-architectural solution for packet classification that mixes CAMs with algorithms based on multi-level cutting the classification space into smaller spaces. The provided solution utilizes the geometrical distribution of rules in the classification space. It provides the deterministic performance of CAMs, support for dynamic updates, and added flexibility for system designers.

Packet classification by multi-level cutting of the classification space

Traditionally, the Internet provides only a “best-effort” service, treating all packets going to the same destination equally. However, providing differentiated services for different users based on their quality requirements is increasingly becoming a demanding issue. For this, routers need to have the capability to distinguish and isolate traffic belonging to different flows. This ability to determine the flow each packet belongs to is called packet classification. Technology vendors are reluctant to support algorithmic solutions for classification due to their nondeterministic performance. Although content addressable memories (CAMs) are favoured by technology vendors due to their deterministic high-lookup rates, they suffer from the problems of high-power consumption and high-silicon cost. This paper provides a new algorithmic-architectural solution for packet classification that mixes CAMs with algorithms based on multilevel cutting of the classification space into smaller spaces. The provided solution utilizes the geometrical distribution of rules in the classification space. It provides the deterministic performance of CAMs, support for dynamic updates, and added flexibility for system designers.

Adaptability in organisms and artifacts: A multi level perspective on adaptive processes

Abstract Adaptability to changing circumstances is a key feature of living creatures. Understanding such adaptive processes is central to developing successful autonomous artifacts. In this paper two perspectives are brought to bear on the issue of adaptability. The first is a short term perspective which looks at adaptability in terms of the interactions between the agent and the environment. The second perspective involves a hierarchical evolutionary model which seeks to identify higher-order forms of adaptability based on the concept of adaptive meta-constructs. Task orientated and agent-centered models of adaptive processes in artifacts are considered from these two perspectives. The former isrepresented by the fitness function approach found in evolutionary learning, and the latter in terms of the concepts of empowerment and homeokinesis found in models derived from the self-organizing systems approach. A meta-construct approach to adaptability based on the identification of higher level meta-metrics is also outlined. 2009 Published by Elsevier B.V.

Generalized social trust across 22 European countries: A multi-level analysis of four competing models

Concern with what can explain variation in generalized social trust has led to an abundance of theoretical models. Defining generalized social trust as a belief in human benevolence, we focus on the emancipation theory and social capital theory as well as the ethnic diversity and economic development models of trust. We then determine which dimensions of individuals’ behavior and attitudes as well as of their national context are the most important predictors. Using data from 20 countries that participated in round one of the European Social Survey, we test these models at their respective level of analysis, individual and/or national. Our analysis revealed that individuals’ own trust in the political system as a moral and competent institution was the most important predictor of generalized social trust at the individual level, while a country’s level of affluence was the most important contextual predictor, indicating that different dimensions are significant at the two levels of analysis. This analysis also raised further questions as to the meaning of social capital at the two levels of analysis and the conceptual equivalence of its civic engagement dimension across cultures.

Territorial politics and the multi-level party

Territorial politics and the statewide party, Regional Studies. The literature on political parties has been affected by a national bias. However, the multilevel nature of party organizations deserves one's attention because parties have responded as well as contributed to the rise in regional authority across most Western democracies. This paper considers statewide parties from a double perspective: as organizations subject to a range of pressures in a multilevel environment, and as actors influencing multilevel political systems. It concludes with a call for stronger links between traditional areas of party and policy research and multilevel party research and for more comparative data collection on multilevel parties and policy positions.

Party organisation in a multi-level system: Party organisational change in Spain and the UK

This article investigates the link between regionalization of the structure of government, regional elections and regionalism on the one hand, and the organization of state-wide political parties in Spain and the UK on the other. It particularly looks at two aspects of the relations between the central and regional levels of party organization: integration of the regional branches in central decision making and autonomy of the regional branches. It argues that the party factors are the most crucial elements explaining party change and that party leaders mediate between environmental changes and party organization. The parties' history and beliefs and the strength of the central leadership condition their ability or willingness to facilitate the emergence of meso-level elites. The institutional and electoral factors are facilitating factors that constitute additional motives for or against internal party decentralization.

Multi-Level Wordline Driver for Low Power SRAMs in Nano-Scale CMOS Technology

In this paper, a multi-level wordline driver scheme is presented to improve SRAM read and write stability while lowering power consumption during hold operation. The proposed circuit applies a shaped wordline voltage pulse during read mode and a boosted wordline pulse during write mode. During read, the applied shaped pulse is tuned at nominal voltage for short period of time, whereas for the remaining access time, the wordline voltage is reduced to a lower level. This pulse results in improved read noise margin without any degradation in access time which is explained by examining the dynamic and nonlinear behavior of the SRAM cell. Furthermore, during hold mode, the wordline voltage starts from a negative value and reaches zero voltage, resulting in a lower leakage current compared to conventional SRAM. Our simulations using TSMC 65nm process show that the proposed wordline driver results in 2X improvement in static read noise margin while the write margin is improved by 3X. In addition, the total leakage of the proposed SRAM is reduced by 10% while the total power is improved by 12% in the worst case scenario of a single SRAM cell. The total area penalty is 10% for a 128Kb standard SRAM array.

Multi-level wordline driver for robust SRAM design in nano-scale CMOS technology

In this paper, a multi-level wordline driver scheme is presented to improve 6T-SRAM read and write stability. The proposed wordline driver generates a shaped pulse during the read mode and a boosted wordline during the write mode. During read, the shaped pulse is tuned at nominal voltage for a short period of time, whereas for the remaining access time, the wordline voltage is reduced to save the power consumption of the cell. This shaped wordline pulse results in improved read noise margin without any degradation in access time for small wordline load. The improvement is explained by examining the dynamic and nonlinear behavior of the SRAM cell. Furthermore, during the hold mode, for a short time (depending on the size of boosting capacitance), wordline voltage becomes negative and charges up to zero after a specific time that results in a lower leakage current compared to conventional SRAM. The proposed technique results in at least 2× improvement in read noise margin while it improves write margin by 3× for lower supply voltages than 0.7 V. The leakage power for the proposed SRAM is reduced by 2% while the total power is improved by 3% in the worst case scenario for an SRAM array. The main advantage of the proposed wordline driver is the improvement of dynamic noise margin with less than 2.5% penalty in area. TSMC 65 nm technology models are used for simulations.