4 resultados para JIT


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The application of fine-grain pipelining techniques in the design of high-performance wave digital filters (WDFs) is described. The problems of latency in feedback loops can be significantly reduced if computations are organized most significant, as opposed to least significant, bit first and if the results are fed back as soon as they are formed. The result is that chips can be designed which offer significantly higher sampling rates than otherwise can be obtained using conventional methods. How these concepts can be extended to the more challenging problem of WDFs is discussed. It is shown that significant increases in the sampling rate of bit-parallel circuits can be achieved using most significant bit first arithmetic.

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With the increase in construction in dense urban environments, the delays associated with managing the material supply chain to site is called into question. Purpose: The aim of this investigation is to gain the perspective of construction contractors operating in a dense urban environment and the resulting strategies adopted to reduce delays in the delivery of materials to site. Methodology: This is achieved through incorporating a comprehensive literature review on the subject in conjunction with industry interviews with construction professionals in the identification of various management issues and corresponding strategies in the reduction of delays in the delivery of materials to site. Findings: The key issue which emerges is the lack of space for unloading bays while the corresponding key strategy is to schedule deliveries outside peak congestion times. Practical Implication: With confined site construction evident throughout the industry and the noted importance of an effective supply chain, the findings here in further assist on-site management in the daily task of ensuring the effective delivery and off-loading of materials in a complex and hazardous environment. Originality/Value: This research aids on-site management of confined site environments in the coordination of the material supply chain to site.

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The authors present a VLSI circuit for implementing wave digital filter (WDF) two-port adaptors. Considerable speedups over conventional designs have been obtained using fine grained pipelining. This has been achieved through the use of most significant bit (MSB) first carry-save arithmetic, which allows systems to be designed in which latency L is small and independent of either coefficient or input data wordlength. L is determined by the online delay associated with the computation required at each node in the circuit (in this case a multiply/add plus two separate additions). This in turn means that pipelining can be used to considerably enhance the sampling rate of a recursive digital filter. The level of pipelining which will offer enhancement is determined by L and is fine-grained rather than bit level. In the case of the circuit considered, L = 3. For this reason pipeline delays (half latches) have been introduced between every two rows of cells to produce a system with a once every cycle sample rate.