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Silicon on Insulator (SOI) substrates offer a promising platform for monolithic high energy physics detectors with integrated read-out electronics and pixel diodes. This paper describes the fabrication and characterisation of specially-configured SOI substrates using improved bonded wafer ion split and grind/polish technologies. The crucial interface between the high resistivity handle silicon and the SOI buried oxide has been characterised using both pixel diodes and circular geometry MOS transistors. Pixel diode breakdown voltages were typically greater than 100V and average leakage current densities at 70 V were only 55 nA/ sq cm. MOS transistors subjected to 24 GeV proton irradiation showed an increased SOI buried oxide trapped charge of only 3.45x1011cn-2 for a dose of 2.7Mrad