10 resultados para Boolean Functions, Equivalence Class


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A new approach to evaluating all multiple complex roots of analytical function f(z) confined to the specified rectangular domain of complex plane has been developed and implemented in Fortran code. Generally f (z), despite being holomorphic function, does not have a closed analytical form thereby inhibiting explicit evaluation of its derivatives. The latter constraint poses a major challenge to implementation of the robust numerical algorithm. This work is at the instrumental level and provides an enabling tool for solving a broad class of eigenvalue problems and polynomial approximations.

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An analysis of the operation of a series-L/parallel-tuned class-E amplifier and its equivalence to the classic shunt-C/series-tuned class-E amplifier are presented. The first reported closed form design equations for the series-L/parallel-tuned topology operating under ideal switching conditions are given. Furthermore, a design procedure is introduced that allows the effect that nonzero switch resistance has on amplifier performance efficiency to be accounted for. The technique developed allows optimal circuit components to be found for a given device series resistance. For a relatively high value of switching device ON series resistance of 4O, drain efficiency of around 66% for the series-L/parallel-tuned topology, and 73% for the shunt-C/series-tuned topology appear to be the theoretical limits. At lower switching device series resistance levels, the efficiency performance of each type are similar, but the series-L/parallel-tuned topology offers some advantages in terms of its potential for MMIC realisation. Theoretical analysis is confirmed by numerical simulation for a 500mW (27dBm), 10% bandwidth, 5 V series-L/parallel-tuned, then, shunt-C/series-tuned class E power amplifier, operating at 2.5 GHz, and excellent agreement between theory and simulation results is achieved. The theoretical work presented in the paper should facilitate the design of high-efficiency switched amplifiers at frequencies commensurate with the needs of modern mobile wireless applications in the microwave frequency range, where intrinsically low-output-capacitance MMIC switching devices such as pHEMTs are to be used.

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Bank conflicts can severely reduce the bandwidth of an interleaved multibank memory and conflict misses increase the miss rate of a cache or a predictor. Both occurrences are manifestations of the same problem: Objects which should be mapped to different indices are accidentally mapped to the same index. Suitable chosen hash functions can avoid conflicts in each of these situations by mapping the most frequently occurring patterns conflict-free. A particularly interesting class of hash functions are the XOR-based hash functions, which compute each set index bit as the exclusive-or of a subset of the address bits. When implementing an XOR-based hash function, it is extremely important to understand what patterns are mapped conflict-free and how a hash function can be constructed to map the most frequently occurring patterns without conflicts. Hereto, this paper presents two ways to reason about hash functions: by their null space and by their column space. The null space helps to quickly determine whether a pattern is mapped conflict-free. The column space is more useful for other purposes, e. g., to reduce the fan-in of the XOR-gates without introducing conflicts or to evaluate interbank dispersion in skewed-associative caches. Examples illustrate how these ideas can be applied to construct conflict-free hash functions.

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Bit-level systolic-array structures for computing sums of products are studied in detail. It is shown that these can be subdivided into two classes and that within each class architectures can be described in terms of a set of constraint equations. It is further demonstrated that high-performance system-level functions with attractive VLSI properties can be constructed by matching data-flow geometries in bit-level and word-level architectures.

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The defensive skin secretions of many amphibians are a rich source of bradykinins and bradykinin-related peptides (BRPs). Members of this peptide group are also common components of reptile and arthropod venoms due to their multiple biological functions that include induction of pain, effects on many smooth muscle types, and lowering systemic blood pressure. While most BRPs are bradykinin receptor agonists, some have curiously been found to be exquisite antagonists, such as the maximakinin gene-related peptide, kinestatin—a specific bradykinin B2-receptor antagonist from the skin of the giant fire-bellied toad, Bombina maxima. Here, we describe the identification, structural and functional characterization of a heptadecapeptide (DYTIRTRLHQGLSRKIV), named ranakinestatin-PPF, from the skin of the Chinese ranid frog, Pelophylax plancyi fukienensis, representing a prototype of a novel class of bradykinin B2-receptor specific antagonist. Using a preconstricted preparation of rat tail arterial smooth muscle, a single dose of 10−6 M of the peptide effectively inhibited the dose-dependent relaxation effect of bradykinin between 10−11 M and 10−5 M and subsequently, this effect was pharmacologically-characterized using specific bradykinin B1- (desArg-HOE140) and B2-receptor (HOE140) antagonists; the data from which demonstrated that the antagonism of the novel peptide was mediated through B2-receptors. Ranakinestatin—PPF—thus represents a prototype of an amphibian skin peptide family that functions as a bradykinin B2-receptor antagonist herein demonstrated using mammalian vascular smooth muscle.

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The design and VLSI implementation of two key components of the class-IV partial response maximum likelihood channel (PR-IV) the adaptive filter and the Viterbi decoder are described. These blocks are implemented using parameterised VHDL modules, from a library of common digital signal processing (DSP) and arithmetic functions. Design studies, based on 0.6 micron 3.3V standard cell processes, indicate that worst case sampling rates of 49 mega-samples per second are achievable for this system, with proportionally high sampling rates for full custom designs and smaller dimension processes. Significant increases in the sampling rate, from 49 MHz to approximately 180 MHz, can be achieved by operating four filter modules in parallel, and this implementation has 50% lower power consumption than a pipelined filter operating at the same speed.

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Elementary computing operations can be arranged within molecules so that problems in chemical, biochemical, and biological situations can be addressed. Problems that are found in small and/or living spaces, where the corresponding semiconductor logic devices cannot operate conveniently, are particularly amenable to this approach. The visualization and monitoring of intracellular species is one such category. Problems in medical diagnostics and therapy form additional categories. Chemists and biologists employ chemical synthesis and molecular biology techniques to build molecular logic devices. The photochemical approach to molecular logic devices is particularly prevalent. The fluorescent photoinduced electron transfer (PET) switching principle is particularly useful for designing logic functions into small molecules.

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In Boolean games, agents try to reach a goal formulated as a Boolean formula. These games are attractive because of their compact representations. However, few methods are available to compute the solutions and they are either limited or do not take privacy or communication concerns into account. In this paper we propose the use of an algorithm related to reinforcement learning to address this problem. Our method is decentralized in the sense that agents try to achieve their goals without knowledge of the other agents’ goals. We prove that this is a sound method to compute a Pareto optimal pure Nash equilibrium for an interesting class of Boolean games. Experimental results are used to investigate the performance of the algorithm.

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An analysis of the operation of a new series-L/parallel-tuned Class-E amplifier and its equivalence to the classic shunt-C/series-tuned Class-E amplifier are presented. The first reported closed form design equations for the series-L/parallel-tuned topology operating under ideal switching conditions are given, including the switch current and voltage in steady state, the circuit component values, the peak values of switch current and voltage and the power-output capability. Theoretical analysis is confirmed by numerical simulation for a 500 mW (27 dBm), 10% bandwidth, 5 V series-L/parallel-tuned, then, shunt-C/series-tuned Class-E power amplifier, operating at 2.5 GHz. Excellent agreement between theory and simulation results is achieved.