Hierarchical Video Summarization in Reference Subspace

In this paper, a hierarchical video structure summarization approach using Laplacian Eigenmap is proposed, where a small set of reference frames is selected from the video sequence to form a reference subspace to measure the dissimilarity between two arbitrary frames. In the proposed summarization scheme, the shot-level key frames are first detected from the continuity of inter-frame dissimilarity, and the sub-shot level and scene level representative frames are then summarized by using K-mean clustering. The experiment is carried on both test videos and movies, and the results show that in comparison with a similar approach using latent semantic analysis, the proposed approach using Laplacian Eigenmap can achieve a better recall rate in keyframe detection, and gives an efficient hierarchical summarization at sub shot, shot and scene levels subsequently.

Behaviours in video

With a significant increment of the number of digital cameras used for various purposes, there is a demanding call for advanced video analysis techniques that can be used to systematically interpret and understand the semantics of video contents, which have been recorded in security surveillance, intelligent transportation, health care, video retrieving and summarization. Understanding and interpreting human behaviours based on video analysis have observed competitive challenges due to non-rigid human motion, self and mutual occlusions, and changes of lighting conditions. To solve these problems, advanced image and signal processing technologies such as neural network, fuzzy logic, probabilistic estimation theory and statistical learning have been overwhelmingly investigated.

Exploring the Views of Police Officers on the Use of Video Taped Evidence in Child Abuse Cases in Northern Ireland

This paper sets out to explore the views and attitudes of police officers in the Greater Belfast area, concerning the process and use of video taped interviews with child witnesses, subsequently used as court evidence in child abuse cases. The information was collected by means of a postal questionnaire, completed by police officers who had all experienced joint interviews with social workers of child witnesses. With the increased use of video evidence as an alternative to the distressing experience of a child appearing in court to give evidence, the research findings and conclusions provide clear messages about future developments both nationally and internationally.

A VLSI Architecture for Variable Block Size Video Motion Estimation

With the advent of new video standards such as MPEG-4 part-10 and H.264/H.26L, demands for advanced video coding, particularly in the area of variable block size video motion estimation (VBSME), are increasing. In this paper, we propose a new one-dimensional (1-D) very large-scale integration architecture for full-search VBSME (FSVBSME). The VBS sum of absolute differences (SAD) computation is performed by re-using the results of smaller sub-block computations. These are distributed and combined by incorporating a shuffling mechanism within each processing element. Whereas a conventional 1-D architecture can process only one motion vector (MV), this new architecture can process up to 41 MV sub-blocks (within a macroblock) in the same number of clock cycles.

Approach to automatic video motion segmentation

A novel, fast automatic motion segmentation approach is presented. It differs from conventional pixel or edge based motion segmentation approaches in that the proposed method uses labelled regions (facets) to segment various video objects from the background. Facets are clustered into objects based on their motion and proximity details using Bayesian logic. Because the number of facets is usually much lower than the number of edges and points, using facets can greatly reduce the computational complexity of motion segmentation. The proposed method can tackle efficiently the complexity of video object motion tracking, and offers potential for real-time content-based video annotation.

Low-power systolic array processor architecture for FSBM video motion estimation

A novel power-efficient systolic array architecture is proposed for full search block matching (FSBM) motion estimation, where the partial distortion elimination algorithm is used to dynamically switch off the computation of eliminated partial candidate blocks. The RTL-level simulation shows that the proposed architecture can reduce the power consumption of the computation part of the algorithm to about 60% of that of the conventional 2D systolic arrays.