Improved Direct Power Control of Grid Connected DC/AC Converters

This paper proposes new direct power control (DPC) strategies for three-phase DC/AC converters with improved dynamic response and steady-state performance. As with an electrical machine, source and converter flux which equal the integration of the respective source and converter voltage are used to define active and reactive power flow. Optimization of the look-up-table used in conventional DPC is outlined first, to improve the power control and reduce the current distortion. Then constant switching frequency DPC is developed where the required converter voltage vector within a fixed half switching period is calculated directly from the active and reactive power errors. Detailed angle compensation due to the finite sampling frequency and the use of integral controller to further improve the power control accuracy, are described. Both simulation and experimental results are used to compare conventional DPC and vector control, and to demonstrate the effectiveness and robustness of the proposed control strategies during active and reactive power steps, and line inductance variations.

New multi-stage DC-DC converters for grid-connected photovoltaic systems

Renewable energy is high on international and national agendas. Currently, grid-connected photovoltaic (PV) systems are a popular technology to convert solar energy into electricity. Existing PV panels have a relatively low and varying output voltage so that the converter installed between the PVs and the grid should be equipped with high step-up and versatile control capabilities. In addition, the output current of PV systems is rich in harmonics which affect the power quality of the grid. In this paper, a new multi-stage hysteresis control of a step-up DC-DC converter is proposed for integrating PVs into a single-phase power grid. The proposed circuitry and control method is experimentally validated by testing on a 600W prototype converter. The developed technology has significant economic implications and could be applied to many distributed generation (DG) systems, especially for the developing countries which have a large number of small PVs connected to their single-phase distribution network. 

Pre-charging and DC Fault Ride-Through of Hybri MMC Based HVDC Systems

Compared to half-bridge based MMCs, full-bridge based systems have the advantage of blocking dc fault, but at the expense of increased power semiconductors and power losses. In view of the relationships among ac/dc voltages and currents in full-bridge based MMC with the negative voltage state, this paper provides a detailed analysis on the link between capacitor voltage variation and the maximum modulation index. A hybrid MMC, consisting of mixed half-bridge and full-bridge circuits to combine their respective advantages is investigated in terms of its pre-charging process and transient dc fault ride-through capability. Simulation and experiment results demonstrate the feasibility and validity of the proposed strategy for a full-bridge based MMC and the hybrid MMC.

Adaptive backstepping droop controller design for multi-terminal high-voltage direct current systems

Wind power is one of the most developed renewable energy resources worldwide. To integrate offshore wind farms to onshore grids, the high-voltage direct current (HVDC) transmission cables interfaced with voltage source converters (VSCs) are considered to be a better solution than conventional approaches. Proper DC voltage indicates successive power transfer. To connect more than one onshore grid, the DC voltage droop control is one of the most popular methods to share the control burden between different terminals. However, the challenges are that small droop gains will cause voltage deviations, while higher droop gain settings will cause large oscillations. This study aims to enhance the performance of the traditional droop controller by considering the DC cable dynamics. Based on the backstepping control concept, DC cables are modelled with a series of capacitors and inductors. The final droop control law is deduced step-by-step from the original remote side. At each step the control error from the previous step is considered. Simulation results show that both the voltage deviations and oscillations can be effectively reduced using the proposed method. Further, power sharing between different terminals can be effectively simplified such that it correlates linearly with the droop gains, thus enabling simple yet accurate system operation and control.

Split Converter-Fed SRM Drive for Flexible Charging in EV/HEV Applications

Electric vehicles (EVs) and hybrid EVs are the way forward for green transportation and for establishing low-carbon economy. This paper presents a split converter-fed four-phase switched reluctance motor (SRM) drive to realize flexible integrated charging functions (dc and ac sources). The machine is featured with a central-tapped winding node, eight stator slots, and six rotor poles (8/6). In the driving mode, the developed topology has the same characteristics as the traditional asymmetric bridge topology but better fault tolerance. The proposed system supports battery energy balance and on-board dc and ac charging. When connecting with an ac power grid, the proposed topology has a merit of the multilevel converter; the charging current control can be achieved by the improved hysteresis control. The energy flow between the two batteries is balanced by the hysteresis control based on their state-of-charge conditions. Simulation results in MATLAB/Simulink and experiments on a 150-W prototype SRM validate the effectiveness of the proposed technologies, which may provide a solution to EV charging issues associated with significant infrastructure requirements.

Physical modelling of millimetre wave signal reflection from forward biased PIN diodes

This paper examines the DC power requirements of PIN diodes which, with suitable applied DC bias, have the potential to reflect or to permit transmission of millimetre wave energy through them by the process of inducing a semiconductor plasma layer in the i-region. The study is conducted using device level simulation of SOI and bulk PIN diodes and reflection modelling based on the Drude conduction model. We examined five diode lengths (60–140 µm) and seven diode thicknesses (4–100 µm). Simulation output for the diodes of varying thicknesses was subsequently used in reflection modelling to assess their performance for 100 GHz operation. It is shown that substantially high DC input power is required in order to induce near total reflection in SOI PIN diodes at 100 GHz. Thinner devices consume less DC power, but reflect less incident radiation for given input power. SOI diodes are shown to have improved carrier confinement compared with bulk diodes.

Exploring figures of merit associated with the suboptimum operation of class-E power amplifiers

Closed-form design equations for the operation of a class-E amplifier for zero switch voltage slope and arbitrary duty cycle are derived. This approach allows an additional degree of freedom in the design of class-E amplifiers which are normally designed for 50 duty ratio. The analysis developed permits the selection of non-unique solutions where amplifier efficiency is theoretically 100 but power output capability is less than that the 50 duty ratio case would permit. To facilitate comparison between 50 (optimal) and non-50 (suboptimal) duty ratio cases, each important amplifier parameter is normalised to its corresponding optimum operation value. It is shown that by choosing a non-50 suboptimal solution, the operating frequency of a class-E amplifier can be extended. In addition, it is shown that by operating the amplifier in the suboptimal regime, other amplifier parameters, for example, transistor output capacitance or peak switch voltage, can be included along with the standard specification criteria of output power, DC supply voltage and operating frequency as additional input design specifications. Suboptimum class-E operation may have potential advantages for monolithic microwave integrated circuit realisation as lower inductance values (lower series resistance, higher self-resonance frequency, less area) may be required when compared with the results obtained for optimal class-E amplifier synthesis. The theoretical analysis conducted here was verified by harmonic balance simulation, with excellent agreement between both methods. © The Institution of Engineering and Technology 2007.

2.4 GHz Class-E power amplifier with transmissionline harmonic terminations

The design procedure, fabrication and measurement of a Class-E power amplifier with excellent second- and third-harmonic suppression levels are presented. A simplified design technique offering compact physical layout is proposed. With a 1.2 mm gate-width GaAs MESFET as a switching device, the amplifier is capable of delivering 19.2 dBm output power at 2.41 GHz, achieves peak PAE of 60% and drain efficiency of 69%, and exhibits 9 dB power gain when operated from a 3 V DC supply voltage. When compared to the classical Class-E two-harmonic termination amplifier, the Class-E amplifier employing three-harmonic terminations has more than 10% higher drain efficiency and 23 dB better third-harmonic suppression level. Experimental results are presented and good agreement with simulation is obtained. Further, to verify the practical implementation in communication systems, the Bluetooth-standard GFSK modulated signal is applied to both two- and three-harmonic amplifiers. The measured RMS FSK deviation error and RMS magnitude error were, for the three-harmonic case, 1.01 kHz and 0.122%, respectively, and, for the two-harmonic case, 1.09 kHz and 0.133%. © 2007 The Institution of Engineering and Technology.

Power-Combining Class-E Amplifier With Finite Choke

A recently introduced power-combining scheme for a Class-E amplifier is, for the first time, experimentally validated in this paper. A small value choke of 2.2 nH was used to substitute for the massive dc-feed inductance required in the classic Class-E circuit. The power-combining amplifier presented, which operates from a 3.2-V dc supply voltage, is shown to be able to deliver a 24-dBm output power and a 9.5-dB gain, with 64% drain efficiency and 57% power-added efficiency at 2.4 GHz. The power amplifier exhibits a 350-MHz bandwidth within which a drain efficiency that is better than 60% and an output power that is higher than 22 dBm were measured. In addition, by adopting three-harmonic termination strategy, excellent second-and third-harmonic suppression levels of 50 and 46 dBc, respectively, were obtained. The complete design cycle from analysis through fabrication to characterization is explained. © 2010 IEEE.

2.4 GHz high-efficiency power-combining Class-E amplifier with transmission-line harmonic traps

Experimental assessments of the modified power-combining Class-E amplifier are described. The technique used to combine the output of individual power amplifiers (PAs) into an unbalanced load without the need for bulky transformers permits the use of small RF chokes useful for the deployment in the EER transmitter. The modified output load network of the PA results in excellent 50 dBc and 46 dBc second and third-harmonic suppressions, dispensing the need for additional lossy filtering block. Operating from a 3.2 V dc supply voltage, the PA exhibits 64% drain efficiency at 24 dBm output power. Over a wide bandwidth of 350 MHz, drain efficiency of better than 60% at output power higher than 22 dBm were achieved. © 2010 IEICE Institute of Electronics Informati.

Idealized Operation of Third-Harmonic-Peaking Class-Ef Power Amplifier with Extended Maximum Operating Frequency

A new variant of Class-EF power amplifier (PA), the so-called third-harmonic-peaking Class-EF, is presented. It inherits a soft-switching operation from the Class-E PA and a low peak switch voltage from the Class-F PA. More importantly, the new topology allows operations at higher frequencies and permits deployment of large transistors which is normally prohibited since they are always accompanied with high output capacitances. Using a simple transmission-line load network, the PA is synthesized to satisfy Class-EF impedances at fundamental frequency, third harmonic, and all even harmonics as well as to simultaneously provide an impedance matching to 50-Ω load.