Three-dimensional electron number densities in a titanium PLD plasma using interferometry

Interferometry has been used to investigate the spatio-temporal evolution of the electron number density in the initial stages of expansion following 248 nm ablation of a titanium target. Three-dimensional electron number densities are obtained from an interferogram of the plasma plume using the Abel inversion technique.

Thickness independence of true phase transition temperatures in barium strontium titanate films

The functional properties of two types of barium strontium titanate (BST) thin film capacitor structures were studied: one set of structures was made using pulsed-laser deposition (PLD) and the other using chemical solution deposition. While initial observations on PLD films looking at the behavior of T-m (the temperature at which the maximum dielectric constant was observed) and T-c(*) (from Curie-Weiss analysis) suggested that the paraelectric-ferroelectric phase transition was progressively depressed in temperature as BST film thickness was reduced, further work suggested that this was not the case. Rather, it appears that the temperatures at which phase transitions occur in the thin films are independent of film thickness. Further, the fact that in many cases three transitions are observable, suggests that the sequence of symmetry transitions that occur in the thin films are the same as in bulk single crystals. This new observation could have implications for the validity of the theoretically produced thin film phase diagrams derived by Pertsev [Phys. Rev. Lett. 80, 1988 (1998)] and extended by Ban and Alpay [J. Appl. Phys. 91, 9288 (2002)]. In addition, the fact that T-m measured for virgin films does not correlate well with the inherent phase transition behavior, suggests that the use of T-m alone to infer information about the thermodynamics of thin film capacitor behavior, may not be sufficient. (C) 2004 American Institute of Physics.

Generic Architecture and Semiconductor Intellectual Property Cores for Avanced Encryption Standard Cryptography

A generic architecture for implementing the advanced encryption standard (AES) encryption algorithm in silicon is proposed. This allows the instantiation of a wide range of chip specifications, with these taking the form of semiconductor intellectual property (IP) cores. Cores implemented from this architecture can perform both encryption and decryption and support four modes of operation: (i) electronic codebook mode; (ii) output feedback mode; (iii) cipher block chaining mode; and (iv) ciphertext feedback mode. Chip designs can also be generated to cover all three AES key lengths, namely 128 bits, 192 bits and 256 bits. On-the-fly generation of the round keys required during decryption is also possible. The general, flexible and multi-functional nature of the approach described contrasts with previous designs which, to date, have been focused on specific implementations. The presented ideas are demonstrated by implementation in FPGA technology. However, the architecture and IP cores derived from this are easily migratable to other silicon technologies including ASIC and PLD and are capable of covering a wide range of modem communication systems cryptographic requirements. Moreover, the designs produced have a gate count and throughput comparable with or better than the previous one-off solutions.

Progressive loss of ferroelectricity under bipolar pulsed fields and experimental determination of non-switchable polarization in Au/Ba0.5Sr0.5TiO3/SrRuO3 thin-film capacitors

175 nm-thick Ba0.5Sr0.5TiO3 (BST) thin film fabricated by pulsed laser deposition (PLD) technique is found to be a mixture of two distributions of material. We discuss whether these two components are nano-regions of paraelectric and ferroelectric phases, or a bimodal grain-size distribution, or an effect of oxygen vacancy gradient from the electrode interface. The fraction of switchable ferroelectric phase decreases under bipolar pulsed fields, but it recovers after removal of the external fields. The plot of capacitance in decreasing dc voltage (C(Vdown arrow) versus that in increasing dc 61 voltage C(Vup arrow) is a superposition of overlapping of two triangles, in contrast to one well-defined triangle for typical ferroelectric SrBi2Ta2O9 thin films.

Understanding thickness effects in thin film capacitors

Pulsed Laser Deposition (PLD) was used to make Au/(Ba0.5Sr0.5)TiO3/(La0.5Sr0.5) CoO3/MgO thin film capacitor structures. Functional properties were studied with changing BST thickness from similar to1265 nm to similar to63 nm. The dielectric constant was found to decrease, and migration of T-m (the temperature at which the dielectric constant is maximum) to lower temperatures occurred as thickness was reduced. Curie-Weiss plots of the as-obtained dielectric data, indicated that the Curie temperature was also systemmatically progressively depressed. Further, fitting to expressions previously used to describe diffuse phase transitions suggested increased diffuseness in transformation behaviour as film thickness decreased. This paper discusses the care needed in interpreting the observations given above. We make particular distinction between the apparent Curie-temperature derived from Curie-Weiss plots of as-measured data, and the inherent Curie temperature determined after correction for the interfacial capacitance. We demonstrate that while the apparent Curie temperature decreases as thickness decreases, the inherent Curie temperature is thickness independent. Thickness-invariant phase transition behaviour is confirmed from analysis of polarisation loops, and from examination of the temperature dependence of the loss-tangent. We particularly note that correction of data for interfacial capacitance does not alter the position of T-m. We must therefore conclude that the position of T-m is not related simply to phase transformation behaviour in BST thin films.

Design of silicon IP cores for biorthogonal wavelet transforms

A methodology for rapid silicon design of biorthogonal wavelet transform systems has been developed. This is based on generic, scalable architectures for the forward and inverse wavelet filters. These architectures offer efficient hardware utilisation by combining the linear phase property of biorthogonal filters with decimation and interpolation. The resulting designs have been parameterised in terms of types of wavelet and wordlengths for data and coefficients. Control circuitry is embedded within these cores that allows them to be cascaded for any desired level of decomposition without any interface logic. The time to produce silicon designs for a biorthogonal wavelet system is only the time required to run synthesis and layout tools with no further design effort required. The resulting silicon cores produced are comparable in area and performance to hand-crafted designs. These designs are also portable across a range of foundries and are suitable for FPGA and PLD implementations.

Rapid design of biorthogonal wavelet transforms

A rapid design methodology for biorthogonal wavelet transform cores has been developed based on a generic, scaleable architecture for wavelet filters. The architecture offers efficient hardware utilisation by combining the linear phase property of biorthogonal filters with decimation in a MAC-based implementation. The design has been captured in VHDL and parameterised in terms of wavelet type, data word length and coefficient word length. The control circuit is embedded within the cores and allows them to be cascaded without any interface glue logic for any desired level of decomposition. The design time to produce silicon layout of a biorthogonal wavelet system is typically less than a day. The silicon cores produced are comparable in area and performance to hand-crafted designs, The designs are portable across a range of foundries and are also applicable to FPGA and PLD implementations.

Does the level of graphical detail of a virtual handball thrower influence a goal-keeper's motor response?

The authors investigated how different levels of detail (LODs) of a virtual throwing action can influence a handball goalkeeper's motor response. Goalkeepers attempted to stop a virtual ball emanating from five different graphical LODs of the same virtual throwing action. The five levels of detail were: a textured reference level (L0), a non-textured level (L1), a wire-frame level (L2), a point-light-display (PLD) representation (L3) and a PLD level with reduced ball size (L4). For each motor response made by the goalkeeper we measured and analyzed the time to respond (TTR), the percentage of successful motor responses, the distance between the ball and the closest limb (when the stopping motion was incorrect) and the kinematics of the motion. Results showed that TTR, percentage of successful motor responses and distance with the closest limb were not significantly different for any of the five different graphical LODs. However the kinematics of the motion revealed that the trajectory of the stopping limb was significantly different when comparing the L1 and L3 levels, and when comparing the L1 and L4 levels. These differences in the control of the goalkeeper's actions suggests that the different level of information available in the PLD representations ( L3 and L4) are causing the goalkeeper to adopt different motor strategies to control the approach of their limb to stop the ball.

PROPERTIES OF ZNS THIN-FILMS PREPARED BY 248-NM PULSED-LASER DEPOSITION

Pulsed laser deposition (PLD) from a hot pressed manganese doped ZnS target using a KrF laser, has produced a high rate deposition method for growing luminescent thin films. Good stoichiometric quality and typical luminescent crystal structures have been observed with a predominant hexagonal phase and little evidence of the cubic phase. The luminescent characteristics were determined by cathodoluminescence and photoluminescence excitation and stable electroluminescence was observed under pulsed dc conditions with a minimum brightness of 150 cd/m2. PLD film characteristics are compared with those observed in radio-frequency sputtered samples.

Differences in the Endocannabinoid System of Sperm from Fertile and Infertile Men

Male infertility is a major cause of problems for many couples in conceiving a child. Recently, lifestyle pastimes such as alcohol, tobacco and marijuana have been shown to have further negative effects on male reproduction. The endocannabinoid system (ECS), mainly through the action of anandamide (AEA) and 2-arachidonoylglycerol (2-AG) at cannabinoid (CB(1), CB(2)) and vanilloid (TRPV1) receptors, plays a crucial role in controlling functionality of sperm, with a clear impact on male reproductive potential. Here, sperm from fertile and infertile men were used to investigate content (through LC-ESI-MS), mRNA (through quantitative RT-PCR), protein (through Western Blotting and ELISA) expression, and functionality (through activity and binding assays) of the main metabolic enzymes of AEA and 2-AG (NAPE-PLD and FAAH, for AEA; DAGL and MAGL for 2-AG), as well as of their binding receptors CB(1), CB(2) and TRPV1. Our findings show a marked reduction of AEA and 2-AG content in infertile seminal plasma, paralleled by increased degradation: biosynthesis ratios of both substances in sperm from infertile versus fertile men. In addition, TRPV1 binding was detected in fertile sperm but was undetectable in infertile sperm, whereas that of CB(1) and CB(2) receptors was not statistically different in the two groups. In conclusion, this study identified unprecedented alterations of the ECS in infertile sperm, that might impact on capacitation and acrosome reaction, and hence fertilization outcomes. These alterations might also point to new biomarkers to determine male reproductive defects, and identify distinct ECS elements as novel targets for therapeutic exploitation of ECS-oriented drugs to treat male fertility problems. 

Rapid design of discrete orthonormal wavelet transforms

A methodology which allows a non-specialist to rapidly design silicon wavelet transform cores has been developed. This methodology is based on a generic architecture utilizing time-interleaved coefficients for the wavelet transform filters. The architecture is scaleable and it has been parameterized in terms of wavelet family, wavelet type, data word length and coefficient word length. The control circuit is designed in such a way that the cores can also be cascaded without any interface glue logic for any desired level of decomposition. This parameterization allows the use of any orthonormal wavelet family thereby extending the design space for improved transformation from algorithm to silicon. Case studies for stand alone and cascaded silicon cores for single and multi-stage analysis respectively are reported. The typical design time to produce silicon layout of a wavelet based system has been reduced by an order of magnitude. The cores are comparable in area and performance to hand-crafted designs. The designs have been captured in VHDL so they are portable across a range of foundries and are also applicable to FPGA and PLD implementations.

Rapid silicon design of discrete orthonormal wavelet transforms based algorithms

A methodology has been developed which allows a non-specialist to rapidly design silicon wavelet transform cores for a variety of specifications. The cores include both forward and inverse orthonormal wavelet transforms. This methodology is based on efficient, modular and scaleable architectures utilising time-interleaved coefficients for the wavelet transform filters. The cores are parameterized in terms of wavelet type and data and coefficient word lengths. The designs have been captured in VHDL and are hence portable across a range of silicon foundries as well as FPGA and PLD implementations.

Rapid VLSI design of biorthogonal wavelet transform cores

A rapid design methodology for biorthogonal wavelet transform cores has been developed. This methodology is based on a generic, scaleable architecture for the wavelet filters. The architecture offers efficient hardware utilization by combining the linear phase property of biorthogonal filters with decimation in a MAC based implementation. The design has been captured in VHDL and parameterized in terms of wavelet type, data word length and coefficient word length. The control circuit is embedded within the cores and allows them to be cascaded without any interface glue logic for any desired level of decomposition. The design time to produce silicon layout of a biorthogonal wavelet based system is typically less than a day. The resulting silicon cores produced are comparable in area and performance to hand-crafted designs. The designs are portable across a range of foundries and are also applicable to FPGA and PLD implementations.

Wavelet packet transforms for system-on-chip applications

A methodology for the production of silicon cores for wavelet packet decomposition has been developed. The scheme utilizes efficient scalable architectures for both orthonormal and biorthogonal wavelet transforms. The cores produced from these architectures can be readily scaled for any wavelet function and are easily configurable for any subband structure. The cores are fully parameterized in terms of wavelet choice and appropriate wordlengths. Designs produced are portable across a range of silicon foundries as well as FPGA and PLD technologies. A number of exemplar implementations have been produced.