21 resultados para Integrated applications

em QUB Research Portal - Research Directory and Institutional Repository for Queen's University Belfast


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Novel V-band substrate integrated waveguide (SIW) filters have been presented. Design procedures for the filters synthesis and mechanisms providing quasi-elliptic response have been explained. The insertion loss of the filters has been measured below 2 dB with microstrip-to-SIW transitions being included.

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The design of a two-stage differential cascode power amplifier (PA) for 81-86 GHz E-band applications is presented. The PA was realised in SiGe technology with fT/fmax 170/250 GHz. A broadband transformer with efficiency higher than 79.4% from 71 GHz to 96 GHz is used as a BALUN. The PA delivers a 4.5 dBm saturated output power and exhibits a 13.4 dB gain at 83.6 GHz. The input and output return losses agree well with the design specifications.

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The transfer of functional integrated circuit layers to other substrates is being investigated for smart-sensors, MEMS, 3-D ICs and mixed semiconductor circuits. There is a need for a planarisation and bondable layer which can be deposited at low temperature and which is IC compatible. This paper describes for the first time the successful use of sputtered silicon in this role for applications as outlined above where high temperature post bond anneals are not required. It also highlights the problems of using sputtered silicon as a bonding layer in applications where post bond temperatures greater than 400C are required.

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The eng-genes concept involves the use of fundamental known system functions as activation functions in a neural model to create a 'grey-box' neural network. One of the main issues in eng-genes modelling is to produce a parsimonious model given a model construction criterion. The challenges are that (1) the eng-genes model in most cases is a heterogenous network consisting of more than one type of nonlinear basis functions, and each basis function may have different set of parameters to be optimised; (2) the number of hidden nodes has to be chosen based on a model selection criterion. This is a mixed integer hard problem and this paper investigates the use of a forward selection algorithm to optimise both the network structure and the parameters of the system-derived activation functions. Results are included from case studies performed on a simulated continuously stirred tank reactor process, and using actual data from a pH neutralisation plant. The resulting eng-genes networks demonstrate superior simulation performance and transparency over a range of network sizes when compared to conventional neural models. (c) 2007 Elsevier B.V. All rights reserved.

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This paper presents a practical algorithm for the simulation of interactive deformation in a 3D polygonal mesh model. The algorithm combines the conventional simulation of deformation using a spring-mass-damping model, solved by explicit numerical integration, with a set of heuristics to describe certain features of the transient behaviour, to increase the speed and stability of solution. In particular, this algorithm was designed to be used in the simulation of synthetic environments where it is necessary to model realistically, in real time, the effect on non-rigid surfaces being touched, pushed, pulled or squashed. Such objects can be solid or hollow, and have plastic, elastic or fabric-like properties. The algorithm is presented in an integrated form including collision detection and adaptive refinement so that it may be used in a self-contained way as part of a simulation loop to include human interface devices that capture data and render a realistic stereoscopic image in real time. The algorithm is designed to be used with polygonal mesh models representing complex topology, such as the human anatomy in a virtual-surgery training simulator. The paper evaluates the model behaviour qualitatively and then concludes with some examples of the use of the algorithm.

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Despite the substantial organisational benefits of integrated IT, the implementation of such systems – and particularly Enterprise Resource Planning (ERP) systems – has tended to be problematic, stimulating an extensive body of research into ERP implementation. This research has remained largely separate from the main IT implementation literature. At the same time, studies of IT implementation have generally adopted either a factor or process approach; both have major limitations. To address these imitations, factor and process perspectives are combined here in a unique model of IT implementation. We argue that • the organisational factors which determine successful implementation differ for integrated and traditional, discrete IT • failure to manage these differences is a major source of integrated IT failure. The factor/process model is used as a framework for proposing differences between discrete and integrated IT.

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Massively parallel networks of highly efficient, high performance Single Instruction Multiple Data (SIMD) processors have been shown to enable FPGA-based implementation of real-time signal processing applications with performance and
cost comparable to dedicated hardware architectures. This is achieved by exploiting simple datapath units with deep processing pipelines. However, these architectures are highly susceptible to pipeline bubbles resulting from data and control hazards; the only way to mitigate against these is manual interleaving of
application tasks on each datapath, since no suitable automated interleaving approach exists. In this paper we describe a new automated integrated mapping/scheduling approach to map algorithm tasks to processors and a new low-complexity list scheduling technique to generate the interleaved schedules. When applied to a spatial Fixed-Complexity Sphere Decoding (FSD) detector
for next-generation Multiple-Input Multiple-Output (MIMO) systems, the resulting schedules achieve real-time performance for IEEE 802.11n systems on a network of 16-way SIMD processors on FPGA, enable better performance/complexity balance than current approaches and produce results comparable to handcrafted implementations.