Cache-Integrated Network Interfaces: Flexible On-Chip Communication and Synchronization for Large-Scale CMPs

Per-core scratchpad memories (or local stores) allow direct inter-core communication, with latency and energy advantages over coherent cache-based communication, especially as CMP architectures become more distributed. We have designed cache-integrated network interfaces, appropriate for scalable multicores, that combine the best of two worlds – the flexibility of caches and the efficiency of scratchpad memories: on-chip SRAM is configurably shared among caching, scratchpad, and virtualized network interface (NI) functions. This paper presents our architecture, which provides local and remote scratchpad access, to either individual words or multiword blocks through RDMA copy. Furthermore, we introduce event responses, as a technique that enables software configurable communication and synchronization primitives. We present three event response mechanisms that expose NI functionality to software, for multiword transfer initiation, completion notifications for software selected sets of arbitrary size transfers, and multi-party synchronization queues. We implemented these mechanisms in a four-core FPGA prototype, and measure the logic overhead over a cache-only design for basic NI functionality to be less than 20%. We also evaluate the on-chip communication performance on the prototype, as well as the performance of synchronization functions with simulation of CMPs with up to 128 cores. We demonstrate efficient synchronization, low-overhead communication, and amortized-overhead bulk transfers, which allow parallelization gains for fine-grain tasks, and efficient exploitation of the hardware bandwidth.

1D-Leaky Wave Antenna Employing Parallel-Plate Waveguide Loaded With PRS and HIS

A new type of one-dimensional leaky-wave antenna (LWA) with independent control of the beam-pointing angle and beamwidth is presented. The antenna is based on a simple structure composed of a bulk parallel-plate waveguide (PPW) loaded with two printed circuit boards (PCBs), each one consisting of an array of printed dipoles. One PCB acts as a partially reflective surface (PRS), and the other grounded PCB behaves as a high impedance surface (HIS). It is shown that an independent control of the leaky-mode phase and leakage rate can be achieved by changing the lengths of the PRS and HIS dipoles, thus resulting in a flexible adjustment of the LWA pointing direction and directivity. The leaky-mode dispersion curves are obtained with a simple Transverse Equivalent Network (TEN), and they are validated with three-dimensional full-wave simulations. Experimental results on fabricated prototypes operating at 15 GHz are reported, demonstrating the versatile and independent control of the LWA performance by changing the PRS and HIS parameters.

Comparison of parallel and perpendicular polarized counterpropagating light for suppressing high harmonic generation

The use of counterpropagating laser pulses to suppress high harmonic generation (HHG) is investigated experimentally for pulses polarized parallel or perpendicular to the driving laser pulse. It is shown for the first time that perpendicularly polarized pulses can suppress HHG. The intensity of the counterpropagating pulse required for harmonic suppression is found to be much larger for perpendicular polarization than for parallel polarization, in good agreement with simple models of the harmonic suppression. These results have applications to quasi-phase-matching of HHG with trains of counterpropagating pulses. (C) 2007 Optical Society of America.

Design criteria for a barrier-based gas-liquid flow distributor for parallel microchannels

This paper presents criteria for the design of a flow distributor for even distribution of gas and liquid flows over parallel microchannels. The design criteria are illustrated for the case of a nitrogen-water Taylor flow (1