Class and Performance in the Age of Global Capitalism

This article addresses the relative absence of class-based analysis in theatre and performance studies, and suggests the reconfiguration of class as performance rather than as it is traditionally conceived as an identity predicated solely on economic stratification. It engages with the occlusion of class by the ascendancy of identity politics based on race, gender and sexuality and its attendant theoretical counterparts in deconstruction and post-structuralism, which became axiomatic as they displaced earlier methodologies to become hegemonic in the arts and humanities. The article proceeds to an assessment of the development of sociological approaches to theatre, particularly the legacy of Raymond Williams and Pierre Bourdieu. The argument concludes with the application of an approach which reconfigures class as performance to the production of Declan Hughes's play Shiver of 2003, which dramatizes the consequences of the dot.com bubble of the late 1990s for ambitious members of the Irish middle class.

Targeting heterogeneous architectures via macro data flow

We propose a data flow based run time system as an efficient tool for supporting execution of parallel code on heterogeneous architectures hosting both multicore CPUs and GPUs. We discuss how the proposed run time system may be the target of both structured parallel applications developed using algorithmic skeletons/parallel design patterns and also more "domain specific" programming models. Experimental results demonstrating the feasibility of the approach are presented. © 2012 World Scientific Publishing Company.

Rapid Implementation and Optimisation of DSP Systems on SoPC Heterogeneous Platforms

The emergence of programmable logic devices as processing platforms for digital signal processing applications poses challenges concerning rapid implementation and high level optimization of algorithms on these platforms. This paper describes Abhainn, a rapid implementation methodology and toolsuite for translating an algorithmic expression of the system to a working implementation on a heterogeneous multiprocessor/field programmable gate array platform, or a standalone system on programmable chip solution. Two particular focuses for Abhainn are the automated but configurable realisation of inter-processor communuication fabrics, and the establishment of novel dedicated hardware component design methodologies allowing algorithm level transformation for system optimization. This paper outlines the approaches employed in both these particular instances.

Core-based Methodology: An Automated Approach for Implementing a Complete System From Algorithms to a Heterogeneous Network Including FPGAs

In this paper, we present a methodology for implementing a complete Digital Signal Processing (DSP) system onto a heterogeneous network including Field Programmable Gate Arrays (FPGAs) automatically. The methodology aims to allow design refinement and real time verification at the system level. The DSP application is constructed in the form of a Data Flow Graph (DFG) which provides an entry point to the methodology. The netlist for parts that are mapped onto the FPGA(s) together with the corresponding software and hardware Application Protocol Interface (API) are also generated. Using a set of case studies, we demonstrate that the design and development time can be significantly reduced using the methodology developed.