Passive Intermodulation in Printed Lines: Effects of Trace Dimensions and Substrate

A comprehensive experimental study was performed to identify and discriminate mechanisms contributing to passive intermodulation (PIM) in microstrip transmission lines. The effects of strip length and width, and substrate materials on PIM performance of printed lines were investigated in the GSM900, DCS1800 and UMTS frequency bands. The major features of the experiment design, sample preparation and test setup are discussed in detail. The measurement results have demonstrated that the PIM level cumulatively grows on the longer microstrip lines and decreases on wider strips and, thus, indicated that the distributed resistive nonlinearity of the printed traces represents the dominant mechanism of intermodulation generation in the printed lines on PTFE-based substrates. © 2009 The Institution of Engineering and Technology.

The tip-sample water bridge and light emission from scanning tunnelling microscopy

The light emission spectrum from a scanning tunnelling microscope (LESTM) is investigated as a function of relative humidity and shown to provide a novel and sensitive means for probing the growth and properties of a water meniscus on the nanometre scale. An empirical model of the light emission process is formulated and applied successfully to replicate the decay in light intensity and spectral changes observed with increasing relative humidity. The modelling indicates a progressive water filling of the tip-sample junction with increasing humidity or, more pertinently, of the volume of the localized surface plasmons responsible for light emission; it also accounts for the effect of asymmetry in structuring of the water molecules with respect to the polarity of the applied bias. This is juxtaposed with the case of a non-polar liquid in the tip-sample nanocavity where no polarity dependence of the light emission is observed. In contrast to the discrete detection of the presence/absence of a water bridge in other scanning probe experiments through measurement of the feedback parameter for instrument control, LESTM offers a means of continuously monitoring the development of the water bridge with sub-nanometre sensitivity. The results are relevant to applications such as dip-pen nanolithography and electrochemical scanning probe microscopy.

Micro-Raman and Spreading Resistance Analysis on Beveled Implanted Germanium for Layer Transfer Applications

Raman and spreading resistance profiling have been used to analyze defects in germanium caused by hydrogen and helium implants, of typical fluences used in layer transfer applications. Beveling has been used to facilitate probing beyond the laser penetration depth. Results of Raman mapping along the projection area reveal that after post-implant annealing at 400°C, some crystal damage remains, while at 600°C, the crystal damage has been repaired. Helium implants create acceptor states beyond the projected range, and for both hydrogen and helium, 1×1016 acceptors/cm2 remain after 600°C. These are thought to be vacancy-related point defect clusters.

Low power field programmable gate array implementation of fast digital signal processing algorithms: characterisation and manipulation of data locality

Dynamic power consumption is very dependent on interconnect, so clever mapping of digital signal processing algorithms to parallelised realisations with data locality is vital. This is a particular problem for fast algorithm implementations where typically, designers will have sacrificed circuit structure for efficiency in software implementation. This study outlines an approach for reducing the dynamic power consumption of a class of fast algorithms by minimising the index space separation; this allows the generation of field programmable gate array (FPGA) implementations with reduced power consumption. It is shown how a 50% reduction in relative index space separation results in a measured power gain of 36 and 37% over a Cooley-Tukey Fast Fourier Transform (FFT)-based solution for both actual power measurements for a Xilinx Virtex-II FPGA implementation and circuit measurements for a Xilinx Virtex-5 implementation. The authors show the generality of the approach by applying it to a number of other fast algorithms namely the discrete cosine, the discrete Hartley and the Walsh-Hadamard transforms.

Home-Based Monitoring and Assessment of Parkinson's Disease

As a clinically complex neurodegenerative disease, Parkinson's disease (PD) requires regular assessment and close monitoring. In our current study, we have developed a home-based tool designed to monitor and assess peripheral motor symptoms. An evaluation of the tool was carried out over a period of ten weeks on ten people with idiopathic PD. Participants were asked to use the tool twice daily over four days, once when their medication was working at its best (

An efficient neural network approach for nanoscale FinFET modelling and circuit simulation

The present paper demonstrates the suitability of artificial neural network (ANN) for modelling of a FinFET in nano-circuit simulation. The FinFET used in this work is designed using careful engineering of source-drain extension, which simultaneously improves maximum frequency of oscillation f(max) because of lower gate to drain capacitance, and intrinsic gain A(V0) = g(m)/g(ds), due to lower output conductance g(ds). The framework for the ANN-based FinFET model is a common source equivalent circuit, where the dependence of intrinsic capacitances, resistances and dc drain current I-d on drain-source V-ds and gate-source V-gs is derived by a simple two-layered neural network architecture. All extrinsic components of the FinFET model are treated as bias independent. The model was implemented in a circuit simulator and verified by its ability to generate accurate response to excitations not used during training. The model was used to design a low-noise amplifier. At low power (J(ds) similar to 10 mu A/mu m) improvement was observed in both third-order-intercept IIP3 (similar to 10 dBm) and intrinsic gain A(V0) (similar to 20 dB), compared to a comparable bulk MOSFET with similar effective channel length. This is attributed to higher ratio of first-order to third-order derivative of I-d with respect to gate voltage and lower g(ds), in FinFET compared to bulk MOSFET. Copyright (C) 2009 John Wiley & Sons, Ltd.

Performance analysis of a metro WDM ring networks with variable-length packets under symmetric and asymmetric traffic

In this paper, we discuss and evaluate two proposed metro wavelength division multiplexing (WDM) ring network architectures for variable-length packet traffic in storage area networks (SANs) settings. The paper begins with a brief review of the relevant architectures and protocols in the literature. Subsequently, the network architectures along with their medium access control (MAC) protocols are described. Performance of the two network architectures is studied by means of computer simulation in terms of their queuing delay, node throughput and proportion of packets dropped. The network performance is evaluated under symmetric and asymmetric traffic scenarios with Poisson and self-similar traffic. (C) 2011 Elsevier Inc. All rights reserved.

Analysis and Design of Class-E3F and Transmission-Line Class-E3F2 Power Amplifiers

In this paper, analysis and synthesis approach for two new variants within the Class-EF power amplifier (PA) family is elaborated. These amplifiers are classified here as Class-E3 F2 and transmission-line (TL) Class-E3 F 2. The proposed circuits offer means to alleviate some of the major issues faced by existing topologies such as substantial power losses due to the parasitic resistance of the large inductor in the Class-EF load network and deviation from ideal Class-EF operation due to the effect of device output inductance at high frequencies. Both lumped-element and transmission-line load networks for the Class-E 3 F PA are described. The load networks of the Class-E3 F and TL Class-E 3 F2amplifier topologies developed in this paper simultaneously satisfy the Class-EF optimum impedance requirements at fundamental frequency, second, and third harmonics as well as simultaneously providing matching to the circuit optimum load resistance for any prescribed system load resistance. Optimum circuit component values are analytically derived and validated by harmonic balance simulations. Trade-offs between circuit figures of merit and component values with some practical limitations being considered are discussed. © 2010 IEEE.

Fabrication and characterisation of high resistivity SOI substrates for monolithic high energy physics detectors

Silicon on Insulator (SOI) substrates offer a promising platform for monolithic high energy physics detectors with integrated read-out electronics and pixel diodes. This paper describes the fabrication and characterisation of specially-configured SOI substrates using improved bonded wafer ion split and grind/polish technologies. The crucial interface between the high resistivity handle silicon and the SOI buried oxide has been characterised using both pixel diodes and circular geometry MOS transistors. Pixel diode breakdown voltages were typically greater than 100V and average leakage current densities at 70 V were only 55 nA/ sq cm. MOS transistors subjected to 24 GeV proton irradiation showed an increased SOI buried oxide trapped charge of only 3.45x1011cn-2 for a dose of 2.7Mrad

Quality factor of E-plane periodically loaded waveguide resonators and filter applications

The quality factor of microwave resonators miniaturised by virtue of periodic loading is assessed. Five X-band resonators in E-plane technology with different miniaturisation factors have been designed to resonate at approximately the same frequency. The loaded quality factor is extracted from the fractional bandwidth and subsequently employed to estimate the unloaded quality factor. The study reveals that the unloaded quality factor drops approximately linearly with the miniaturisation. Subsequently design guidelines for E-plane filters with periodically loaded resonators are provided by means of an example involving a fifth-order filter. Full-wave simulated and experimental results are presented to validate the study.

Power Stored and Quality Factors in Frequency Selective Surfaces at THz Frequencies

A study of the external, loaded and unloaded quality factors for frequency selective surfaces (FSSs) is presented. The study is focused on THz frequencies between 5 and 30 THz, where ohmic losses arising from the conductors become important. The influence of material properties, such as metal thickness, conductivity dispersion and surface roughness, is investigated. An equivalent circuit that models the FSS in the presence of ohmic losses is introduced and validated by means of full-wave results. Using both full-wave methods as well as a circuit model, the reactive energy stored in the vicinity of the FSS at resonance upon plane-wave incidence is presented. By studying a doubly periodic array of aluminium strips, it is revealed that the reactive power stored at resonance increases rapidly with increasing periodicity. Moreover, it is demonstrated that arrays with larger periodicity-and therefore less metallisation per unit area-exhibit stronger thermal absorption. Despite this absorption, arrays with higher periodicities produce higher unloaded quality factors. Finally, experimental results of a fabricated prototype operating at 14 THz are presented.

Efficient advanced encryption standard implementation using lookup and normal basis

A new type of advanced encryption standard (AES) implementation using a normal basis is presented. The method is based on a lookup technique that makes use of inversion and shift registers, which leads to a smaller size of lookup for the S-box than its corresponding implementations. The reduction in the lookup size is based on grouping sets of inverses into conjugate sets which in turn leads to a reduction in the number of lookup values. The above technique is implemented in a regular AES architecture using register files, which requires less interconnect and area and is suitable for security applications. The results of the implementation are competitive in throughput and area compared with the corresponding solutions in a polynomial basis.