136 resultados para soft drink bottles


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The characterisation of soils for civil engineering purposes depends on removing sufficiently high-quality samples from the ground. Accurate evaluation of sample quality is therefore important if reliable design parameters are to be determined. This paper describes the use of unconfined shear wave velocity (V s) and suction (u r) measurements to assess sample quality rapidly in soft clay. Samples of varying quality from three well-characterised soft clay sites are initially assessed using conventional techniques, and their results compared with V s and u r measurements performed on the same samples. It is observed that the quality of samples indicated by these measurements is very similar to those inferred from traditional disturbance measures, with V s being the more reliable indicator. A tentative empirically derived criterion, based on samples tested in this project, is proposed to quantify sample disturbance combining both V s and u r measurements. Further work using this criterion on different materials is important so as to test its usefulness.

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To enable reliable data transfer in next generation Multiple-Input Multiple-Output (MIMO) communication systems, terminals must be able to react to fluctuating channel conditions by having flexible modulation schemes and antenna configurations. This creates a challenging real-time implementation problem: to provide the high performance required of cutting edge MIMO standards, such as 802.11n, with the flexibility for this behavioural variability. FPGA softcore processors offer a solution to this problem, and in this paper we show how heterogeneous SISD/SIMD/MIMD architectures can enable programmable multicore architectures on FPGA with similar performance and cost as traditional dedicated circuit-based architectures. When applied to a 4×4 16-QAM Fixed-Complexity Sphere Decoder (FSD) detector we present the first soft-processor based solution for real-time 802.11n MIMO.

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Massively parallel networks of highly efficient, high performance Single Instruction Multiple Data (SIMD) processors have been shown to enable FPGA-based implementation of real-time signal processing applications with performance and
cost comparable to dedicated hardware architectures. This is achieved by exploiting simple datapath units with deep processing pipelines. However, these architectures are highly susceptible to pipeline bubbles resulting from data and control hazards; the only way to mitigate against these is manual interleaving of
application tasks on each datapath, since no suitable automated interleaving approach exists. In this paper we describe a new automated integrated mapping/scheduling approach to map algorithm tasks to processors and a new low-complexity list scheduling technique to generate the interleaved schedules. When applied to a spatial Fixed-Complexity Sphere Decoding (FSD) detector
for next-generation Multiple-Input Multiple-Output (MIMO) systems, the resulting schedules achieve real-time performance for IEEE 802.11n systems on a network of 16-way SIMD processors on FPGA, enable better performance/complexity balance than current approaches and produce results comparable to handcrafted implementations.