Patterning and switching of nano-size ferroelectric memory cells

A "top-down" approach using a-beam lithography and a "bottom-up" one using self-assembly methods were used to fabricate ferroelelectric Pb(Zr,Ti)O-3, SrBi2Ta2O9 and BaTiO3 nanostructures with lateral sizes in the range of 30 nm to 100 nm. Switching of single sub-100 nm cells was achieved and piezoelectric hysteresis loops were recorded using a scanning force microscope working in piezoresponse mode. The piezoelectricity and its hysteresis acquired for 100 nm PZT cells demonstrate that a further decrease in lateral size under 100 nm appears to be possible and that the size effects are not fundamentally limiting on increase density of non-volatile ferroelectric memories in the Gbit range.

HpMC: An Energy- Aware Management System for Multi-Level Memory Architectures

DRAM technology faces density and power challenges to increase capacity because of limitations of physical cell design. To overcome these limitations, system designers are exploring alternative solutions that combine DRAM and emerging NVRAM technologies. Previous work on heterogeneous memories focuses, mainly, on two system designs: PCache, a hierarchical, inclusive memory system, and HRank, a flat, non-inclusive memory system. We demonstrate that neither of these designs can universally achieve high performance and energy efficiency across a suite of HPC workloads. In this work, we investigate the impact of a number of multilevel memory designs on the performance, power, and energy consumption of applications. To achieve this goal and overcome the limited number of available tools to study heterogeneous memories, we created HMsim, an infrastructure that enables n-level, heterogeneous memory studies by leveraging existing memory simulators. We, then, propose HpMC, a new memory controller design that combines the best aspects of existing management policies to improve performance and energy. Our energy-aware memory management system dynamically switches between PCache and HRank based on the temporal locality of applications. Our results show that HpMC reduces energy consumption from 13% to 45% compared to PCache and HRank, while providing the same bandwidth and higher capacity than a conventional DRAM system.

Death and Consumer Culture

Among the most veiled and emotionally charged of life’s experiences are those related to death. Given that poetry has long been recognized as an unparalleled means of expressing and understanding the most complex and emotional aspects of life (Sherry and Schouten, 2002), it is of little surprise that few poets regarded as the finest of all wordsmiths have not, since time immemorial, grappled with death.

Recently, within marketing and consumer research, poetry has slowly but progressively come to be recognized as a means by which to understand, express, celebrate, and/or confront that which defies scientific or other more “scholarly” explanation (Canniford, 2012; Wijland, 2011; Sherry and Schouten, 2002). This “poetic turn” has manifest itself most notably within the nascent realm of Consumer Culture Theory (CCT); mainly in poetry reading sessions held—with published chapbooks in hand—in concurrence with the annual CCT symposium. Death-related poetry penned by marketing and consumer researchers has there entered—albeit randomly—the CCT circuit (see, for example: Arnould, 2014; Steinfield, 2014; Gabel, 2013, 2010; Downey, 2011, 2010a, 2010b, 2010c).

This chapter represents the first formal, organized attempt to better understand death-related consumption experience and meaning via the creation and dissemination of original works of poetry. The chapter’s title reflects the broad, eclectic perspective of death and consumption herein pursued. We consider funerary and other—good, service, and ideological—product consumption activities and experiences transpiring in the context of death. We also embrace the notion that death often brutally consumes those dealing with it; a sort of “consumption of consumers by death.” In turn, as vividly expressed in several of the poems in this chapter, consumption acts or experiences and/or memories thereof may be instrumental in coping with “being consumed by death.”

MESAS

MESAS is an urban intervention that promotes the relationship with everyday sound through indispensable pieces of furniture for the domestic, the professional and the playful in our lives – the table. Different uses and contexts determine the many variations in form; from dinning, to coffee tables, kitchen, garden, meeting, bar, side or game tables. The MESAS project, by artists Pedro Rebelo and Ricardo Jacinto was conceived for Rua Direita in Viseu and consists of a sequence of tables suspended throughout the street, which reveal experiences and memories through sound. The materiality, context and utility of each table articulate sonorities that include the manipulation of objects on their tops or the conversations happening around them, as well their impact on the soundscapes of the places in which they are situated. The project makes audible these particular experiences through a set of sound installations associated with places such as the jewellery, the school, or the tailor’s.

Som da Maré: Um Projeto Participativo de Arte Sonora

In May 2014, the participative Project Som da Maré brings together the creative energy of a group of inhabitants from a cluster of favelas in Maré (Rio de Janeiro)* through the sonic arts. The work recalls everyday experiences, memories, stories and places. These memories elicit narratives that leave traces in space while contributing to the workings of local cultural.

The result of four months of workshops and fieldwork forms the basis of two cultural interventions: an exhibition in Museu da Maré** and guided soundwalks in the city of Rio de Janeiro. These interventions present realities, histories and ambitions of everyday life in the Maré favelas through immersive sound installation, documentary photography, text and objects.

Som da Maré brings together various groups of participants who together have developed themes, materials and strategies for the articulation of elements of everyday life in Maré. Participants include secondary level students under the Fundação de Amparo à Pesquisa do Estado do Rio de Janeiro (FAPERJ) “Young Talent” scholarships and their families, post-graduate students at the Universidade Federal do Rio de Janeiro (UFRJ), PhD students from the Sonic Arts Research Centre (Queen’s University Belfast) and members of the Cia Marginal, a theatre company based in Maré. The project also counts with the participation of academics from music, ethnomusicology, visual art and architecture at the UFRJ and a partnership with the Museu da Maré. Over thirty people have come together to make this project possible.

Per-Flow State Management Technique for High-Speed Networks

Flow processing is a fundamental element of stateful traffic classification and it has been recognized as an essential factor for delivering today’s application-aware network operations and security services. The basic function within a flow processing engine is to search and maintain a flow table, create new flow entries if no entry matches and associate each entry with flow states and actions for future queries. Network state information on a per-flow basis must be managed in an efficient way to enable Ethernet frame transmissions at 40 Gbit/s (Gbps) and 100 Gbps in the near future. This paper presents a hardware solution of flow state management for implementing large-scale flow tables on popular computer memories using DDR3 SDRAMs. Working with a dedicated flow lookup table at over 90 million lookups per second, the proposed system is able to manage 512-bit state information at run time.

WHIRLBOB, the Whirlpool Based Variant of STRIBOB: Lighter, Faster, and Constant Time

WHIRLBOB, also known as STRIBOBr2, is an AEAD (Authenticated Encryption with Associated Data) algorithm derived from STRIBOBr1 and the Whirlpool hash algorithm. WHIRLBOB/STRIBOBr2 is a second round candidate in the CAESAR competition. As with STRIBOBr1, the reduced-size Sponge design has a strong provable security link with a standardized hash algorithm. The new design utilizes only the LPS or ρ component of Whirlpool in flexibly domain-separated BLNK Sponge mode. The number of rounds is increased from 10 to 12 as a countermeasure against Rebound Distinguishing attacks. The 8 ×8 - bit S-Box used by Whirlpool and WHIRLBOB is constructed from 4 ×4 - bit “MiniBoxes”. We report on fast constant-time Intel SSSE3 and ARM NEON SIMD WHIRLBOB implementations that keep full miniboxes in registers and access them via SIMD shuffles. This is an efficient countermeasure against AES-style cache timing side-channel attacks. Another main advantage of WHIRLBOB over STRIBOBr1 (and most other AEADs) is its greatly reduced implementation footprint on lightweight platforms. On many lower-end microcontrollers the total software footprint of π+BLNK = WHIRLBOB AEAD is less than half a kilobyte. We also report an FPGA implementation that requires 4,946 logic units for a single round of WHIRLBOB, which compares favorably to 7,972 required for Keccak / Keyak on the same target platform. The relatively small S-Box gate count also enables efficient 64-bit bitsliced straight-line implementations. We finally present some discussion and analysis on the relationships between WHIRLBOB, Whirlpool, the Russian GOST Streebog hash, and the recent draft Russian Encryption Standard Kuznyechik.

Inexact-aware architecture design for ultra-low power bio-signal analysis

This study introduces an inexact, but ultra-low power, computing architecture devoted to the embedded analysis of bio-signals. The platform operates at extremely low voltage supply levels to minimise energy consumption. In this scenario, the reliability of static RAM (SRAM) memories cannot be guaranteed when using conventional 6-transistor implementations. While error correction codes and dedicated SRAM implementations can ensure correct operations in this near-threshold regime, they incur in significant area and energy overheads, and should therefore be employed judiciously. Herein, the authors propose a novel scheme to design inexact computing architectures that selectively protects memory regions based on their significance, i.e. their impact on the end-to-end quality of service, as dictated by the bio-signal application characteristics. The authors illustrate their scheme on an industrial benchmark application performing the power spectrum analysis of electrocardiograms. Experimental evidence showcases that a significance-based memory protection approach leads to a small degradation in the output quality with respect to an exact implementation, while resulting in substantial energy gains, both in the memory and the processing subsystem.

Heterogeneous error-resilient scheme for spectral analysis in ultra-low power wearable electrocardiogram devices

Wearable devices performing advanced bio-signal analysis algorithms are aimed to foster a revolution in healthcare provision of chronic cardiac diseases. In this context, energy efficiency is of paramount importance, as long-term monitoring must be ensured while relying on a tiny power source. Operating at a scaled supply voltage, just above the threshold voltage, effectively helps in saving substantial energy, but it makes circuits, and especially memories, more prone to errors, threatening the correct execution of algorithms. The use of error detection and correction codes may help to protect the entire memory content, however it incurs in large area and energy overheads which may not be compatible with the tight energy budgets of wearable systems. To cope with this challenge, in this paper we propose to limit the overhead of traditional schemes by selectively detecting and correcting errors only in data highly impacting the end-to-end quality of service of ultra-low power wearable electrocardiogram (ECG) devices. This partition adopts the protection of either significant words or significant bits of each data element, according to the application characteristics (statistical properties of the data in the application buffers), and its impact in determining the output. The proposed heterogeneous error protection scheme in real ECG signals allows substantial energy savings (11% in wearable devices) compared to state-of-the-art approaches, like ECC, in which the whole memory is protected against errors. At the same time, it also results in negligible output quality degradation in the evaluated power spectrum analysis application of ECG signals.

Peace by Piece: (Re) imagining Division in Belfast’s Contested Spaces through Memory

This paper investigates processes and actions of diversifying memories of division in Northern Ireland’s political conflict known as the Troubles. Societal division is manifested in its built fabric and territories that have been adopted by predominant discourses of a fragmented society in Belfast; the unionist east and the nationalist west. The aim of the paper is to explore current approaches in planning contested spaces that have changed over time, leading to success in many cases. The argument is that divided cities, like Belfast, feature spatial images and memories of division that range from physical, clear-cut segregation to manifested actions of violence and have become influential representations in the community’s associative memory. While promoting notions of ‘re-imaging’ by current councils demonstrates a total erasure of the Troubles through cleansing its local collective memory, there yet remains an attempt to communicate a different tale of the city’s socio-economic past, to elaborate its supremacy for shaping future lived memories. Yet, planning Belfast’s contested areas is still suffering from a poor understanding of the context and its complexity against overambitious visions.