206 resultados para BIM Implementation


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The design and implementation of a programmable cyclic redundancy check (CRC) computation circuit architecture, suitable for deployment in network related system-on-chips (SoCs) is presented. The architecture has been designed to be field reprogrammable so that it is fully flexible in terms of the polynomial deployed and the input port width. The circuit includes an embedded configuration controller that has a low reconfiguration time and hardware cost. The circuit has been synthesised and mapped to 130-nm UMC standard cell [application-specific integrated circuit (ASIC)] technology and is capable of supporting line speeds of 5 Gb/s. © 2006 IEEE.

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The objective of this paper is to identify the various managerial constraints, difficulties and issues encountered and resulting strategies adopted, to aid in the management of the various and often complex health and safety concerns, which occur within a confined construction site. This is achieved through classifying the various managerial burdens encountered with the numerous strategies adopted, to ensure the successful management of such confined environments within the realm of health and safety. Through an extensive literature review and detailed interviews, a comprehensive insight into the health and safety concerns within a confined construction site environment is portrayed. The leading managerial strategies to the management of health and safety on confined construction sites may be listed as follows; (1) Traffic Management Plan, (2) Effective Resource Management Plan, (3) Temporary Facilities Management Plan, (4) Safe System of Work Plan, (5) Site Safety Plan, (6) Design Site Layout, (7) Space Management Plan, (8) Effective Program Management, and (9) Space Scheduling. Based on the research, it can be concluded, that through effective management of these issues identified coupled with implementing the various strategies highlighted; successful management of health and safety within a confined construction site environment is attainable.

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ntegrated organisational IT systems, such as enterprise resource planning (ERP), supply chain management (SCM) and digital manufacturing (DM), have promised and delivered substantial performance benefits to many adopting firms. However, implementations of such systems have tended to be problematic. ERP projects, in particular, are prone to cost and time overruns, not delivering anticipated benefits and often being abandoned before completion. While research has developed around IT implementation, this has focused mainly on standalone (or discrete), as opposed to integrated, IT systems. Within this literature, organisational (i.e., structural and cultural) characteristics have been found to influence implementation success. The key aims of this research are (a) to investigate the role of organisational characteristics in determining IT implementation success; (b) to determine whether their influence differs for integrated IT and discrete IT projects; and (c) to develop specific guidelines for managers of integrated IT implementations. An in-depth comparative case study of two IT projects was conducted within a major aerospace manufacturing company.

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Dynamic power consumption is very dependent on interconnect, so clever mapping of digital signal processing algorithms to parallelised realisations with data locality is vital. This is a particular problem for fast algorithm implementations where typically, designers will have sacrificed circuit structure for efficiency in software implementation. This study outlines an approach for reducing the dynamic power consumption of a class of fast algorithms by minimising the index space separation; this allows the generation of field programmable gate array (FPGA) implementations with reduced power consumption. It is shown how a 50% reduction in relative index space separation results in a measured power gain of 36 and 37% over a Cooley-Tukey Fast Fourier Transform (FFT)-based solution for both actual power measurements for a Xilinx Virtex-II FPGA implementation and circuit measurements for a Xilinx Virtex-5 implementation. The authors show the generality of the approach by applying it to a number of other fast algorithms namely the discrete cosine, the discrete Hartley and the Walsh-Hadamard transforms.