202 resultados para implementation


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Background: Several guidelines for cystic fibrosis (CF) caregivers exist, but information about their implementation is lacking.

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Background: Several guidelines oil infection control and treatment of infection exist for cystic fibrosis (CF) caregivers, although the extent of implementation is variable.

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Continuous large-scale changes in technology and the globalization of markets have resulted in the need for many SMEs to use innovation as a means of seeking competitive advantage where innovation includes both technological and organizational perspectives (Tapscott, 2009). However, there is a paucity of systematic and empirical research relating to the implementation of innovation management in the context of SMEs. The aim of this article is to redress this imbalance via an empirical study created to develop and test a model of innovation implementation in SMEs. This study uses Structural Equation Modelling (SEM) to test the plausibility of an innovation model, developed from earlier studies, as the basis of a questionnaire survey of 395 SMEs in the UK. The resultant model and construct relationship results are further probed using an explanatory multiple case analysis to explore ‘how’ and ‘why’ type questions within the model and construct relationships. The findings show that the
effects of leadership, people and culture on innovation implementation are mediated by business improvement activities relating to Total Quality Management/Continuous Improvement (TQM/CI) and product and process developments. It is concluded that SMEs have an opportunity to leverage existing quality and process improvement activities to move beyond continuous
improvement outcomes towards effective innovation implementation. The article concludes by suggesting areas suitable for further research.

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The design and implementation of a programmable cyclic redundancy check (CRC) computation circuit architecture, suitable for deployment in network related system-on-chips (SoCs) is presented. The architecture has been designed to be field reprogrammable so that it is fully flexible in terms of the polynomial deployed and the input port width. The circuit includes an embedded configuration controller that has a low reconfiguration time and hardware cost. The circuit has been synthesised and mapped to 130-nm UMC standard cell [application-specific integrated circuit (ASIC)] technology and is capable of supporting line speeds of 5 Gb/s. © 2006 IEEE.