Local and semilocal density functional computations for crystals of 1-alkyl-3-methyl-imidazolium salts

The accuracy and reliability of popular density functional approximations for the compounds giving origin to room temperature ionic liquids have been assessed by computing the T=0 K crystal structure of several 1-alkyl-3-methyl-imidazolium salts. Two prototypical exchange-correlation approximations have been considered, i.e., the local density approximation (LDA) and one gradient corrected scheme [PBE-GGA, Phys. Rev. Lett. 77, 3865 (1996)]. Comparison with low-temperature x-ray diffraction data shows that the equilibrium volume predicted by either approximations is affected by large errors, nearly equal in magnitude (~10%), and of opposite sign. In both cases the error can be traced to a poor description of the intermolecular interactions, while the intramolecular structure is fairly well reproduced by LDA and PBE-GGA. The PBE-GGA optimization of atomic positions within the experimental unit cell provides results in good agreement with the x-ray structure. The correct system volume can also be restored by supplementing PBE-GGA with empirical dispersion terms reproducing the r-6 attractive tail of the van der Waals interactions.

Rheological characterization of thermoresponsive semisolids for vaginal HIV vaccine delivery

Purpose. To manufacture and characterize, through oscillatory rheology, thermoresponsive rheologically structured vehicles
(RSV’s) capable of enhanced retention times within the vagina for the purposes of HIV vaccine delivery.
Methods. Pluronics F127, F108 and F68 were investigated and RSV’s were prepared by dissolving sorbic acid (0.1% w/w)
and mucoadhesive component (Gantrez SBF97 or Noveon AA1, 3% w/w) in the required amount of H2O and NaOH.
Pluronic (10% w/w) was added via mixing in an ice-bath followed by hydroxyethylcellulose (5%) and subsequently
poly(vinylpyrollidone) (4%w/w). Oscillatory temperature sweeps between 10-38°C were preformed within the linear
viscoelastic region of the formulations on an AR2000 rheometer (T.A. Instruments, Surrey, England) with a 2cm diameter
parallel plate geometry and a plate gap of 1000µm at 1Hz.

Idealised operation of zero-voltage-switching series-L/parallel-tuned Class-E power amplifier

An analysis of a modified series-L/parallel-tuned Class-E power amplifier is presented, which includes the effects that a shunt capacitance placed across the switching device will have on Class-E behaviour. In the original series L/parallel-tuned topology in which the output transistor capacitance is not inherently included in the circuit, zero-current switching (ZCS) and zero-current derivative switching (ZCDS) conditions should be applied to obtain optimum Class-E operation. On the other hand, when the output transistor capacitance is incorporated in the circuit, i.e. in the modified series-L/parallel-tuned topology, the ZCS and ZCDS would not give optimum operation and therefore zero-voltage-switching (ZVS) and zero-voltage-derivative switching (ZVDS) conditions should be applied instead. In the modified series-L/parallel-tuned Class-E configuration, the output-device inductance and the output-device output capacitance, both of which can significantly affect the amplifier's performance at microwave frequencies, furnish part, if not all, of the series inductance L and the shunt capacitance COUT, respectively. Further, when compared with the classic shunt-C/series-tuned topology, the proposed Class-E configuration offers some advantages in terms of 44% higher maximum operating frequency (fMAX) and 4% higher power-output capability (PMAX). As in the classic topology, the fMAX of the proposed amplifier circuit is reached when the output-device output capacitance furnishes all of the capacitance COUT, for a given combination of frequency, output power and DC supply voltage. It is also shown that numerical simulations agree well with theoretical predictions.

Even order harmonic Series-L/Parallel-Tuned Class-E frequency multiplier

In this brief, we propose a new Class-E frequency multiplier based on the recently introduced Series-L/Parallel-Tuned Class-E amplifier. The proposed circuit produces even-order output harmonics. Unlike previously reported solutions the proposed circuit can operate under 50% duty ratio which minimizes the conduction losses. The circuit also offers the possibility for increased maximum operating frequency, reduced peak switch voltage, higher load resistance and inherent bond wire absorption; all potentially useful in monolithic microwave integrated circuit implementations. In addition, the circuit topology suggested large transistors with high output capacitances can be deployed. Theoretical design equations are given and the predictions made using these are shown to agree with harmonic balance circuit simulation results.

Transmission line matching effects on the performance of shunt-C/series-tuned and series-L/parallel-tuned Class-E amplifiers

The impact that the transmission-line load-network has on the performance of the recently introduced series-L/parallel-tuned Class-E amplifier and the classic shunt-C/series-tuned configuration when compared to optimally derived lumped load networks is discussed. In addition an improved load topology which facilitates harmonic suppression of up to 5 order as required for maximum Class-E efficiency as well as load resistance transformation and a design procedure involving the use of Kuroda's identity and Richard's transformation enable a distributed synthesis process which dispenses with the need for iterative tuning as previously required in order to achieve optimum Class-E operation. © 2005 IEEE.

A meta-heuristic approach to parallel code generation

The efficient generation of parallel code for multi-processor environments, is a large and complicated issue. Attempts to address this problem have always resulted in significant input from users. Because of constraints on user knowledge and time, the automation of the process is a promising and practically important research area. In recent years heuristic approaches have been used to capture available knowledge and make it available for the parallelisation process. Here, the introduction of a novel approach of neural network techniques is combined with an expert system technique to enhance the availability of knowledge to aid in the automatic generation of parallel code.