90 resultados para bridge circuits, DC-AC power convertors, harmonic distortion, probability, PWM inverters


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A theoretical analysis is reported in this paper to investigate the effect that a second harmonic signal which might be present at an amplifier’s input has on generating additional intermodulation products, particularly the third-order intermodulation (IM3) products. The analysis shows that the amplitude of an extra generated IM3 component is equal to the product of the fundamental amplitude, the second harmonic amplitude, and the second order Taylor series coefficient. The effect of the second order harmonic on the IM3 is examined through a simulated example of a 2.22-GHz 10-W Class-EF amplifier whereby the IM3 levels have been reduced by 2-3 dB after employing a second harmonic termination stub at the input.

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This paper presents initial results of evaluating suitability of the conventional two-tone CW passive intermodulation (PIM) test for characterization of modulated signal distortion by passive nonlinearities in base station antennas and RF front-end. A comprehensive analysis of analog and digitally modulated waveforms in the transmission lines with weak distributed nonlinearity has been performed using the harmonic balance analysis and X-parameters in Advanced Design System (ADS) simulator. The nonlinear distortion metrics used in the conventional two-tone CW PIM test have been compared with the respective spectral metrics applied to the modulated waveforms, such as adjacent channel power ratio (ACPR) and error vector magnitude (EVM). It is shown that the results of two-tone CW PIM tests are consistent with the metrics used for assessment of signal integrity of both analog and digitally modulated waveforms.

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The mechanism of harmonic generation in the interaction of short laser pulses with solid targets holds the promise for the production of intense attosecond pulses. Using the three dimensional code ILLUMINATION we have performed simulations pertaining to an experimentally realizable parameter range by high power laser systems to become available in the near future. The emphasis of the investigation is on the coherent nature of the emission. We studied the influence of the plasma scale length on the harmonic efficiency, angular distribution and the focusability using a post processing scheme in which the far-field of the emission is calculated. It is found that the presence of an extended density profile reduces significantly the transverse coherence length of the emitted XUV light. The different stages of the interaction for two particular cases can be followed with the help of movies.

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Damping torque analysis is a well-developed technique for understanding and studying power system oscillations. This paper presents the applications of damping torque analysis for DC bus implemented damping control in power transmission networks in two examples. The first example is the investigation of damping effect of shunt VSC (Voltage Source Converter) based FACTS voltage control, i.e., STATCOM (Static Synchronous Compensator) voltage control. It is shown in the paper that STATCOM voltage control mainly contributes synchronous torque and hence has little effect on the damping of power system oscillations. The second example is the damping control implemented by a Battery Energy Storage System (BESS) installed in a power system. Damping torque analysis reveals that when BESS damping control is realized by regulating exchange of active and reactive power between the BESS and power system respectively, BESS damping control exhibits different properties. It is concluded by damping torque analysis that BESS damping control implemented by regulating active power is better with less interaction with BESS voltage control and more robust to variations of power system operating conditions. In the paper, all analytical conclusions obtained are demonstrated by simulation results of example power systems.

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A new universal power quality manager is proposed. The proposal treats a number of power quality problems simultaneously. The universal manager comprises a combined series and shunt three-phase PWM controlled converters sharing a common DC link. A control scheme based on fuzzy logic is introduced and the general features of the design and operation processes are outlined. The performance of two configurations of the proposed power quality manager are compared in terms of a recently formulated unified power quality index. The validity and integrity of the proposed system is proved through computer simulated experiments

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A novel power-efficient systolic array architecture is proposed for full search block matching (FSBM) motion estimation, where the partial distortion elimination algorithm is used to dynamically switch off the computation of eliminated partial candidate blocks. The RTL-level simulation shows that the proposed architecture can reduce the power consumption of the computation part of the algorithm to about 60% of that of the conventional 2D systolic arrays.

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In this brief, we propose a new Class-E frequency multiplier based on the recently introduced Series-L/Parallel-Tuned Class-E amplifier. The proposed circuit produces even-order output harmonics. Unlike previously reported solutions the proposed circuit can operate under 50% duty ratio which minimizes the conduction losses. The circuit also offers the possibility for increased maximum operating frequency, reduced peak switch voltage, higher load resistance and inherent bond wire absorption; all potentially useful in monolithic microwave integrated circuit implementations. In addition, the circuit topology suggested large transistors with high output capacitances can be deployed. Theoretical design equations are given and the predictions made using these are shown to agree with harmonic balance circuit simulation results.

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In this article we propose a technique for dual-band Class-E power amplifier design using composite right/left-handed transmission lines, CRLH TLs. Design equations are presented and design procedures are elaborated. Because of the nonlinear phase dispersion characteristic of CRLH TLs, the single previous attempt at applying this method to dual bond Class-E amplifier design was not sufficient to simultaneously satisfy, the minimum requirement of Class-E impedances at both the fundamental and the second harmonic frequencies. This article rectifies this situation. A design example illustrating the synthesis procedure for a 0.5W-5V dual band Class-E amplifier circuit simultaneously operated at 900 MHz and 2.4 GHz is given and compared with ADS simulation.

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In this paper, an analysis is performed in order to determine the effects that variations in circuit component values, frequency, and duty cycle have on the performance of the newly introduced inverse Class-E amplifier. Analysis of the inverse Class-E amplifier under the generalized condition of arbitrary duty cycle is performed and it is shown that the inverse Class-E amplifier is reasonably tolerant to circuit parameter variations. When compared to the conventional Class-E amplifier the inverse Class-E amplifier offers the potential for high efficiency at increased output power as well as higher peak output power levels than are available with a conventional Class-E amplifier. Further the inverse Class-E amplifier provides more flexibility for deployment with a pulsewidth modulator as the means of producing full-carrier amplitude modulation (AM) due to its ability to operate to high AM modulation indices.

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The first analysis and synthesis equations for the newly introduced inverse Class-E amplifier when operated with a finite d.c. blocking capacitance and a finite d.c.-feed inductance are presented in the paper. Closed-form design equations are derived in order to establish the circuit component values required for optimum synthesis. Excellent agreement between numerical simulation results and theoretical prediction is obtained. It is shown that drain efficiency approaching 100 at a pre-specified output power level can be achieved as zero-current switching and zero-current derivative conditions are simultaneously satisfied. The proposed analysis offers the prospect for realistic MMIC implementation.

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A comparison of dc characteristics of fully depleted double-gate (DG) MOSFETs with respect to low-power circuit applications and device scaling has been performed by two-dimensional device simulation. Three different DG MOSFET structures including a conventional N+ polysilicon gate device with highly doped Si layer, an asymmetrical P+/N+ polysilicon gate device with low doped Si layer and a midgap metal gate device with low doped Si layer have been analysed. It was found that DG MOSFET with mid-gap metal, gates yields the best dc parameters for given off-state drain leakage current and highest immunity to the variation of technology parameters (gate length, gate oxide thickness and Si layer thickness). It is also found that an asymmetrical P+/N+ polysilicon gate DG MOSFET design offers comparable dc characteristics, but better parameter immunity to technology tolerances than a conventional DG MOSFET. (C) 2004 Elsevier Ltd. All rights reserved.

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A power combining strategy for Class-E and inverse Class-E amplifiers operating at high frequencies such that they can operate into unbalanced loads is proposed. This power combining method is particularly important for the inverse Class-E amplifier configuration whose single-stage topology is naturally limited for small-to-medium power applications. Design examples for the power combining synthesis of classical Class-E and then inverse Class-E amplifiers with specification 3 V-1.5 W-2.5 GHz are given. For this specification, it is shown that a three-branch combiner has a natural 50 V output impedance. The resulting circuits are simulated within Agilent Advanced Design Systems environment with good agreement to theoretical prediction. Further the performance of the proposed circuits when operated in a Linear amplification using Nonlinear Components transmitter configuration whereby two-branch amplifiers are driven with constant amplitude conjugate input phase signals is investigated.

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An analysis of the operation of a series-L/parallel-tuned class-E amplifier and its equivalence to the classic shunt-C/series-tuned class-E amplifier are presented. The first reported closed form design equations for the series-L/parallel-tuned topology operating under ideal switching conditions are given. Furthermore, a design procedure is introduced that allows the effect that nonzero switch resistance has on amplifier performance efficiency to be accounted for. The technique developed allows optimal circuit components to be found for a given device series resistance. For a relatively high value of switching device ON series resistance of 4O, drain efficiency of around 66% for the series-L/parallel-tuned topology, and 73% for the shunt-C/series-tuned topology appear to be the theoretical limits. At lower switching device series resistance levels, the efficiency performance of each type are similar, but the series-L/parallel-tuned topology offers some advantages in terms of its potential for MMIC realisation. Theoretical analysis is confirmed by numerical simulation for a 500mW (27dBm), 10% bandwidth, 5 V series-L/parallel-tuned, then, shunt-C/series-tuned class E power amplifier, operating at 2.5 GHz, and excellent agreement between theory and simulation results is achieved. The theoretical work presented in the paper should facilitate the design of high-efficiency switched amplifiers at frequencies commensurate with the needs of modern mobile wireless applications in the microwave frequency range, where intrinsically low-output-capacitance MMIC switching devices such as pHEMTs are to be used.