Nile blue-based nano-sized pH sensors for simultaneous far-red and near-infrared live bioimaging

Diblock copolymer vesicles are tagged with pH-responsive Nile Blue-based labels and used as a new type of pH-responsive colorimetric/fluorescent biosensor for far-red and near-infrared imaging of live cells. The diblock copolymer vesicles described herein are based on poly(2-(methacryloyloxy)ethyl phosphorylcholine-block-2-(diisopropylamino)ethyl methacrylate) [PMPC-PDPA]: the biomimetic PMPC block is known to facilitate rapid cell uptake for a wide range of cell lines, while the PDPA block constitutes the pH-responsive component that enables facile vesicle self-assembly in aqueous solution. These biocompatible vesicles can be utilized to detect interstitial hypoxic/acidic regions in a tumor model via a pH-dependent colorimetric shift. In addition, they are also useful for selective intracellular staining of lysosomes and early endosomes via subtle changes in fluorescence emission. Such nanoparticles combine efficient cellular uptake with a pH-responsive Nile Blue dye label to produce a highly versatile dual capability probe. This is in marked contrast to small molecule dyes, which are usually poorly uptaken by cells, frequently exhibit cytotoxicity, and are characterized by intracellular distributions invariably dictated by their hydrophilic/hydrophobic balance.

Synthesis of Co3O4 nano-octahedra enclosed by {111} facets and their excellent lithium storage properties as anode material of lithium ion batteries

Abstract
Nano-sized(nO-Co3O4, 387nm)andmicron-sized(mO-Co3O4, 6.65 mm) Co3O4 octahedraenclosedby
{111}facetshavebeenbothsynthesizedthroughawetchemicalmethodfollowedbythermal
treatment,andservedasanodematerialoflithium ionbatteries(LIBs).Electrochemicalresults
demonstratethatthenO-Co3O4 showsexcellentlongcyclabilityandratecapability.ThenO-Co3O4
candeliverastablechargecapacityashighas955.5mAhg1 upto200cycleswithoutnoticeable
capacityfadingatacharge/dischargecurrentdensityof0.1Ag1 (ca. 0.11C).Theexcellent
electrochemicalperformanceisascribedtothenano-sizeandthe{111}facetsthatenclosethe
octahedra. WhilethemO-Co3O4 could onlymaintain288.5mAhg1 after 200cycles,illustratingvery
poorcyclingperformance,whichisascribedtothelargeparticlesizethatmaycausehugevolume
changeduringrepeatedcharging/discharging process.TheresultsrevealthattheCo3O4 nano-
octahedrawouldbeapromisinganodematerialforthenext-generationofLIBs.

Water-mediated electrochemical nano-writing on thin ceria films

Bias dependent mechanisms of irreversible cathodic and anodic processes on a pure CeO2 film are studied using modified atomic force microscopy (AFM). For a moderate positive bias applied to the AFM tip an irreversible electrochemical reduction reaction is found, associated with significant local volume expansion. By changing the experimental conditions we are able to deduce the possible role of water in this process. Simultaneous detection of tip height and current allows the onset of conductivity and the electrochemical charge transfer process to be separated, further elucidating the reaction mechanism. The standard anodic/cathodic behavior is recovered in the high bias regime, where a sizable transport current flows between the tip and the film. These studies give insight into the mechanisms of the tip-induced electrochemical reactions as mediated by electronic currents, and into the role of water in these processes, as well as providing a different approach for electrochemical nano-writing.

Can a carbon nano-coating resist metallic phase transformation in silicon substrate during nanoimpact?

Nanomechanical response of a silicon specimen coated with a sp3 crystalline carbon coating (1.8 nm thickness) was investigated using MD simulation. A sharp conical rigid tip was impacted at the speed of 50 m/sec up to a depth of ~80% of the coating thickness. Unlike pure silicon specimen, no metallic phase transformation was observed i.e. a thin coating was able to resist Si-I to Si-II metallic phase transformation signifying that the coating could alter the stress distribution and thereby the contact tribology of the substrate. The stress state of the system, radial distribution function and the load-displacement curve were all aligned with above observations

Investigation of Finish-cut of Microelectrodischarge Milling for Nano Surface Finish

In this article, the machining conditions to achieve nanometric surface roughness in finish cut microelectrodischarge milling were investigated. For a constant gap voltage, the effect of feed rate and capacitance was studied on average surface roughness (Ra) and maximum peak-to-valley roughness height (Ry). Statistical models were developed using a three-level, two-factor experimental design. The developed models minimized Ra and Ry by desirability function approach. Maximum desirability was found to be more than 98%. The minimum values of Ra and Ry were 23 and 173 nm, respectively, for 1.00 μm s-1 feed rate and 0.01 nF capacitance. Verification experiments were conducted to check the accuracy of the models, where the responses were found to be very close to the predicted values. Thus, the developed models can be used to generate nanometric level surface finish, which are useful for many applications in microelectromechanical systems.

Micro- and Nano-scale Tribo-Corrosion of Cast CoCrMo

Previous studies have established that some of the wear damage seen on cast CoCrMo joint surface is caused by entrained third-body hard particles. In this study, wet-cell micro-indentation and nano-scratch tests have been carried out with the direct aim of simulating wear damage induced by single abrasive particles entrained between the surfaces of cast CoCrMo hip implants. In situ electrochemical current noise measurements were uniquely performed to detect and study the wear-induced corrosion as well as the repassivation kinetics under the micro-/nano-scale tribological process. A mathematical model has been explored for the CoCrMo repassivation kinetics after surface oxide film rupture. Greater insights into the nature of the CoCrMo micro-/nano-scale wear-corrosion mechanisms and deformation processes are determined, including the identification of slip band formation, matrix/carbide deformation, nanocrystalline structure formation and strain-induced phase transformation. The electrochemical current noise provides evidence of instantaneous transient corrosion activity at the wearing surface resulting from partial oxide rupturing and stripping, concurrent with the indent/scratch.

Multi-Level Wordline Driver for Low Power SRAMs in Nano-Scale CMOS Technology

In this paper, a multi-level wordline driver scheme is presented to improve SRAM read and write stability while lowering power consumption during hold operation. The proposed circuit applies a shaped wordline voltage pulse during read mode and a boosted wordline pulse during write mode. During read, the applied shaped pulse is tuned at nominal voltage for short period of time, whereas for the remaining access time, the wordline voltage is reduced to a lower level. This pulse results in improved read noise margin without any degradation in access time which is explained by examining the dynamic and nonlinear behavior of the SRAM cell. Furthermore, during hold mode, the wordline voltage starts from a negative value and reaches zero voltage, resulting in a lower leakage current compared to conventional SRAM. Our simulations using TSMC 65nm process show that the proposed wordline driver results in 2X improvement in static read noise margin while the write margin is improved by 3X. In addition, the total leakage of the proposed SRAM is reduced by 10% while the total power is improved by 12% in the worst case scenario of a single SRAM cell. The total area penalty is 10% for a 128Kb standard SRAM array.

Multi-level wordline driver for robust SRAM design in nano-scale CMOS technology

In this paper, a multi-level wordline driver scheme is presented to improve 6T-SRAM read and write stability. The proposed wordline driver generates a shaped pulse during the read mode and a boosted wordline during the write mode. During read, the shaped pulse is tuned at nominal voltage for a short period of time, whereas for the remaining access time, the wordline voltage is reduced to save the power consumption of the cell. This shaped wordline pulse results in improved read noise margin without any degradation in access time for small wordline load. The improvement is explained by examining the dynamic and nonlinear behavior of the SRAM cell. Furthermore, during the hold mode, for a short time (depending on the size of boosting capacitance), wordline voltage becomes negative and charges up to zero after a specific time that results in a lower leakage current compared to conventional SRAM. The proposed technique results in at least 2× improvement in read noise margin while it improves write margin by 3× for lower supply voltages than 0.7 V. The leakage power for the proposed SRAM is reduced by 2% while the total power is improved by 3% in the worst case scenario for an SRAM array. The main advantage of the proposed wordline driver is the improvement of dynamic noise margin with less than 2.5% penalty in area. TSMC 65 nm technology models are used for simulations.