391 resultados para Architecture, Medieval


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Agriculture played an important role in the organisation of economy and society in early medieval Ireland (cal ad 400–1150). This paper examines archaeobotanical evidence for agricultural production and consumption, incorporating newly available data. Analysis of evidence from 60 sites revealed that hulled barley and oat were the dominant crops of this period. Naked wheat was present at many sites, but was not the primary crop in most cases. Rye was a minor crop in all locations where recorded. Other crops—including flax, pea and bean—were occasionally present. These crop choices provide a contrast with evidence from many other regions in contemporary Europe. In the case of Ireland, there is increased evidence for crops during the second half of the early medieval period, both in terms of the number of sites where remains were recovered and also the variety of crops cultivated; this may reflect a shift towards a greater emphasis on arable agriculture. The contribution of documentary sources and scientific analyses towards investigating food products is also highlighted in this study.

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During the early medieval period, Ireland was politically organised into a large number of very small kingdoms. Unlike much of Western Europe, it had not been incorporated into the Roman Empire, and as a consequence, settlement remained exclusively rural in character until the Viking period. Extensive documentary, archaeological, zooarchaeological and macro-plant evidence provides a detailed reconstruction of the livestock and arable economy of the period. Cattle ownership formed the basis of wealth as well as being an indicator of status in society, and this is reflected in its clear dominance of the livestock economy during this period. From the eighth century onwards, however, cereal production appears to grow in importance as subsistence farming gave way to the production of agricultural surplus. This is reflected in cereal diversification and in the construction of watermills and more efficient grain-drying kilns. At the same time, settlement underwent significant changes and the relative importance of cattle in some areas began to decline.

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The worsening of process variations and the consequent increased spreads in circuit performance and consumed power hinder the satisfaction of the targeted budgets and lead to yield loss. Corner based design and adoption of design guardbands might limit the yield loss. However, in many cases such methods may not be able to capture the real effects which might be way better than the predicted ones leading to increasingly pessimistic designs. The situation is even more severe in memories which consist of substantially different individual building blocks, further complicating the accurate analysis of the impact of variations at the architecture level leaving many potential issues uncovered and opportunities unexploited. In this paper, we develop a framework for capturing non-trivial statistical interactions among all the components of a memory/cache. The developed tool is able to find the optimum memory/cache configuration under various constraints allowing the designers to make the right choices early in the design cycle and consequently improve performance, energy, and especially yield. Our, results indicate that the consideration of the architectural interactions between the memory components allow to relax the pessimistic access times that are predicted by existing techniques.

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The upcoming IEEE 802.11ac standard boosts the throughput of previous IEEE 802.11n by adding wider 80 MHz and 160 MHz channels with up to 8 antennas (versus 40 MHz channel and 4 antennas in 802.11n). This necessitates new 1-8 stream 256/512-point Fast Fourier Transform (FFT) / inverse FFT (IFFT) processing with 80/160 MSample/s throughput. Although there are abundant related work, they all fail to meet the requirements of IEEE 802.11ac FFT/IFFT on point size, throughput and multiple data streams at the same time. This paper proposes the first software defined FFT/IFFT architecture as a solution. By making use of a customised soft stream processor on FPGA, we show how a software defined FFT architecture can meet all the requirements of IEEE 802.11ac with low cost and high resource efficiency. When compared with dedicated Xilinx FFT core, our implementation exhibits only one third of the resources also up to three times of resource efficiency.

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Current data-intensive image processing applications push traditional embedded architectures to their limits. FPGA based hardware acceleration is a potential solution but the programmability gap and time consuming HDL design flow is significant. The proposed research approach to develop “FPGA based programmable hardware acceleration platform” that uses, large number of Streaming Image processing Processors (SIPPro) potentially addresses these issues. SIPPro is pipelined in-order soft-core processor architecture with specific optimisations for image processing applications. Each SIPPro core uses 1 DSP48, 2 Block RAMs and 370 slice-registers, making the processor as compact as possible whilst maintaining flexibility and programmability. It is area efficient, scalable and high performance softcore architecture capable of delivering 530 MIPS per core using Xilinx Zynq SoC (ZC7Z020-3). To evaluate the feasibility of the proposed architecture, a Traffic Sign Recognition (TSR) algorithm has been prototyped on a Zedboard with the color and morphology operations accelerated using multiple SIPPros. Simulation and experimental results demonstrate that the processing platform is able to achieve a speedup of 15 and 33 times for color filtering and morphology operations respectively, with a significant reduced design effort and time.

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