Voltage over-scaling:A cross-layer design perspective for energy efficient systems

Today's multi-media electronic era is driven by the increasing demand for small multifunctional devices able to support diverse services. Unfortunately, the high levels of transistor integration and performance required by such devices lead to an unprecedented increase of on-chip power that significantly limits the battery lifetime and even poses reliability concerns. Several techniques have been developed to address the power increase, but voltage over-scaling (VOS) is considered to be one of the most effective ones due to the quadratic dependence of voltage on dynamic power consumption. However, VOS may not always be applicable since it increases the delay in all paths of a system and may limit high performance required by today's complex applications. In addition, application of VOS is further complicated since it increases the variations in transistor characteristics imposed by their tiny size which can lead to large delay and leakage variations, making it difficult to meet delay and power budgets. This paper presents a review of various cross-layer design options that can provide solutions for dynamic voltage over-scaling and can potentially assist in meeting the strict power budgets and yield/quality requirements of future systems. © 2011 IEEE.

Voltage scalable high-speed robust hybrid arithmetic units using adaptive clocking

In this paper, we explore various arithmetic units for possible use in high-speed, high-yield ALUs operated at scaled supply voltage with adaptive clock stretching. We demonstrate that careful logic optimization of the existing arithmetic units (to create hybrid units) indeed make them further amenable to supply voltage scaling. Such hybrid units result from mixing right amount of fast arithmetic into the slower ones. Simulations on different hybrid adder and multipliers in BPTM 70 nm technology show 18%-50% improvements in power compared to standard adders with only 2%-8% increase in die-area at iso-yield. These optimized datapath units can be used to construct voltage scalable robust ALUs that can operate at high clock frequency with minimal performance degradation due to occasional clock stretching. © 2009 IEEE.

Fair charging strategies for EVs connected to a low-voltage distribution network

The development of smart grid technologies and appropriate charging strategies are key to accommodating large numbers of Electric Vehicles (EV) charging on the grid. In this paper a general framework is presented for formulating the EV charging optimization problem and three different charging strategies are investigated and compared from the perspective of charging fairness while taking into account power system constraints. Two strategies are based on distributed algorithms, namely, Additive Increase and Multiplicative Decrease (AIMD), and Distributed Price-Feedback (DPF), while the third is an ideal centralized solution used to benchmark performance. The algorithms are evaluated using a simulation of a typical residential low voltage distribution network with 50% EV penetration. © 2013 IEEE.

Azepanium-based ionic liquids as green electrolytes for high voltage supercapacitors

This work provides a first-time-study of Azepanium-based ionic liquids (ILs) as electrolyte components for electrochemical double layer capacitors (EDLCs). Herein, two Azepanium-based ILs, namely N-methyl, N-butyl-azepanium bis(trifluoromethanesulfonyl)imide (Azp(14)TFSI) and N-methyl, N-hexyl-azepanium bis(trifluoromethanesulfonyl)imide (Azp(16)TFSI) were compared with the established IL N-butyl, N-methylpyrrolidinium bis(trifluoromethanesulfonyl)imide (Pyr(14)TFSI) in terms of viscosity, conductivity, thermal stability and electrochemical behavior in EDLC systems. The ILs' operative potentials were found to be comparable, leading to operative voltages up to 3.5 V without significant electrolyte degradation. 

Characterisation of UK and Irish Cold-Pressed Rapeseed Oils in Relation to Quality Indices and Constituents.

Cold-pressed rapeseed oil (CPRSO) is produced when seeds from an oilseed rape crop are mechanically crushed whilst at a low temperature. CPRSO’s popularity is rapidly expanding and is now produced in most Northern European countries including both N.Ireland and ROI. The CPRSO industry is still relatively new and therefore not as widely researched as other high quality oils. Fifteen CPRSO from The UK, Ireland and France were examined to determine characteristic differences between the oils. Two samples of extra-virgin olive oil and two samples of refined rapeseed oil were also included in the investigation to assess performance against market competitors. The antioxidant potential of the oils was assessed using the ABTS and DPPH radical scavenging assays. Both unexpectedly showed that refined rapeseed oil had the highest potential whilst there was significant difference between many of the CPRSO’s. The acid value (ACOS method Cd 3d-63) ranged widely from 0.47-3.41. To predict the stability during storage, an accelerated oxidation test was carried out where the oils were placed in an oven (60°C) and peroxide value was monitored. The results showed extra-virgin olive oil underwent the least oxidation during the trial. The refined rapeseed oil suffered the worst levels of oxidation whilst the CPRSO’s performed similarly but with some variation. Fatty acid composition was investigated with GC-MS and some of the major fatty acids were found to differ significantly between producers. Minor compound analysis was achieved with extraction and identification through HPLC. All results are critically discussed and compared to relevant published studies.

Adaptive backstepping droop controller design for multi-terminal high-voltage direct current systems

Wind power is one of the most developed renewable energy resources worldwide. To integrate offshore wind farms to onshore grids, the high-voltage direct current (HVDC) transmission cables interfaced with voltage source converters (VSCs) are considered to be a better solution than conventional approaches. Proper DC voltage indicates successive power transfer. To connect more than one onshore grid, the DC voltage droop control is one of the most popular methods to share the control burden between different terminals. However, the challenges are that small droop gains will cause voltage deviations, while higher droop gain settings will cause large oscillations. This study aims to enhance the performance of the traditional droop controller by considering the DC cable dynamics. Based on the backstepping control concept, DC cables are modelled with a series of capacitors and inductors. The final droop control law is deduced step-by-step from the original remote side. At each step the control error from the previous step is considered. Simulation results show that both the voltage deviations and oscillations can be effectively reduced using the proposed method. Further, power sharing between different terminals can be effectively simplified such that it correlates linearly with the droop gains, thus enabling simple yet accurate system operation and control.

Performance and Fault Tolerance of Preconditioned Iterative Solvers on Low-Power ARM Architectures

As the complexity of computing systems grows, reliability and energy are two crucial challenges asking for holistic solutions. In this paper, we investigate the interplay among concurrency, power dissipation, energy consumption and voltage-frequency scaling for a key numerical kernel for the solution of sparse linear systems. Concretely, we leverage a task-parallel implementation of the Conjugate Gradient method, equipped with an state-of-the-art pre-conditioner embedded in the ILUPACK software, and target a low-power multi core processor from ARM.In addition, we perform a theoretical analysis on the impact of a technique like Near Threshold Voltage Computing (NTVC) from the points of view of increased hardware concurrency and error rate.

Characterisation of Large Disturbance Rotor Angle and Voltage Stability in Interconnected Power Networks with Distributed Wind Generation

Wind generation in highly interconnected power networks creates local and centralised stability issues based on their proximity to conventional synchronous generators and load centres. This paper examines the large disturbance stability issues (i.e. rotor angle and voltage stability) in power networks with geographically distributed wind resources in the context of a number of dispatch scenarios based on profiles of historical wind generation for a real power network. Stability issues have been analysed using novel stability indices developed from dynamic characteristics of wind generation. The results of this study show that localised stability issues worsen when significant penetration of both conventional and wind generation is present due to their non-complementary characteristics. In contrast, network stability improves when either high penetration of wind and synchronous generation is present in the network. Therefore, network regions can be clustered into two distinct stability groups (i.e. superior stability and inferior stability regions). Network stability improves when a voltage control strategy is implemented at wind farms, however both stability clusters remain unchanged irrespective of change in the control strategy. Moreover, this study has shown that the enhanced fault ride-through (FRT) strategy for wind farms can improve both voltage and rotor angle stability locally, but only a marginal improvement is evident in neighbouring regions.

High-Performance WSe2 CMOS Technology and Integrated Circuits.

Because of their extraordinary structural and electrical properties, two dimensional materials are currently being pursued for applications such as thin-film transistors and integrated circuit. One of the main challenges that still needs to be overcome for these applications is the fabrication of air-stable transistors with industry-compatible complementary metal oxide semiconductor (CMOS) technology. In this work, we experimentally demonstrate a novel high performance air-stable WSe2 CMOS technology with almost ideal voltage transfer characteristic, full logic swing and high noise margin with different supply voltages. More importantly, the inverter shows large voltage gain (~38) and small static power (Pico-Watts), paving the way for low power electronic system in 2D materials.