'Ideological content and institutional frameworks: Unionist identities in Northern Ireland and Scotland'

This article examines the complex interactions between British national identity and the territorial identities of Northern Ireland and Scotland. We argue that the current literature on national identities in Britain misunderstands the nature of British identities in Northern Ireland and Scotland. Indeed, much of this literature wrongly defines Unionists in both of these areas. By examining the content of British national identity, a comparison of Scotland and Northern Ireland reveals that Unionism finds political significance through an ideological project committed to the Union. However, we also have to account for the differences in the Unionist ideology of Scotland and Northern Ireland. We argue that the institutional framework in which these identities and ideologies are exercised explains this variation. Overall, we argue that the debate on nationalism in the United Kingdom has not adequately shown how the integrative functions of British national identity can co-exist with the separatist nature of territorial national identity.

A Scalable and Programmable Modular Traffic Manager Architecture

A key issue in the design of next generation Internet routers and switches will be provision of traffic manager (TM) functionality in the datapaths of their high speed switching fabrics. A new architecture that allows dynamic deployment of different TM functions is presented. By considering the processing requirements of operations such as policing and congestion, queuing, shaping and scheduling, a solution has been derived that is scalable with a consistent programmable interface. Programmability is achieved using a function computation unit which determines the action (e.g. drop, queue, remark, forward) based on the packet attribute information and a memory storage part. Results of a Xilinx Virtex-5 FPGA reference design are presented.

Contingency Fit, Institutional Fit, and Firm Performance: A Metafit Approach to Organization–Environment Relationships

In this paper, we attempt to reconcile contingency and institutional fit approaches concerning the organization-environment relationship. While prior scholarly research has examined both theories and compared their impacts on organizational fit and performance, we lay the groundwork for a meta-fit approach by investigating how contingency and institutional fit interact to influence firm performance. We test our theoretical framework using a dataset of 3,259 respondents from 1,904 companies regarding task environmental demands and institutional demands on organizational design across a broad range of industries and firm size classes. Our results show that contingency and institutional fit provide complementary and interdependent explanations of firm performance. Importantly, our findings indicate that for firms under conditions of “quasi-fit” rather than perfect contingency fit or optimal institutional fit, improvements in contingency and/or institutional fit will result in better performance. However, firms with high contingency fit are less vulnerable to deviation from institutional fit in the formation of firm performance, while firms with perfect institutional fit will slightly decrease their performance when they strive to achieve contingency fit.

An On Demand Queue Management Architecture for a Programmable Traffic Manager

A queue manager (QM) is a core traffic management (TM) function used to provide per-flow queuing in access andmetro networks; however current designs have limited scalability. An on-demand QM (OD-QM) which is part of a new modular field-programmable gate-array (FPGA)-based TM is presented that dynamically maps active flows to the available physical resources; its scalability is derived from exploiting the observation that there are only a few hundred active flows in a high speed network. Simulations with real traffic show that it is a scalable, cost-effective approach that enhances per-flow queuing performance, thereby allowing per-flow QM without the need for extra external memory at speeds up to 10 Gbps. It utilizes 2.3%–16.3% of a Xilinx XC5VSX50t FPGA and works at 111 MHz.