A new look at dual-hop relaying: Performance limits with hardware impairments

Physical transceivers have hardware impairments that create distortions which degrade the performance of communication systems. The vast majority of technical contributions in the area of relaying neglect hardware impairments and, thus, assume ideal hardware. Such approximations make sense in low-rate systems, but can lead to very misleading results when analyzing future high-rate systems. This paper quantifies the impact of hardware impairments on dual-hop relaying, for both amplify-and-forward and decode-and-forward protocols. The outage probability (OP) in these practical scenarios is a function of the effective end-to-end signal-to-noise-and-distortion ratio (SNDR). This paper derives new closed-form expressions for the exact and asymptotic OPs, accounting for hardware impairments at the source, relay, and destination. A similar analysis for the ergodic capacity is also pursued, resulting in new upper bounds. We assume that both hops are subject to independent but non-identically distributed Nakagami-m fading. This paper validates that the performance loss is small at low rates, but otherwise can be very substantial. In particular, it is proved that for high signal-to-noise ratio (SNR), the end-to-end SNDR converges to a deterministic constant, coined the SNDR ceiling, which is inversely proportional to the level of impairments. This stands in contrast to the ideal hardware case in which the end-to-end SNDR grows without bound in the high-SNR regime. Finally, we provide fundamental design guidelines for selecting hardware that satisfies the requirements of a practical relaying system.

Accelerating integer-based fully homomorphic encryption using Comba multiplication

Fully Homomorphic Encryption (FHE) is a recently developed cryptographic technique which allows computations on encrypted data. There are many interesting applications for this encryption method, especially within cloud computing. However, the computational complexity is such that it is not yet practical for real-time applications. This work proposes optimised hardware architectures of the encryption step of an integer-based FHE scheme with the aim of improving its practicality. A low-area design and a high-speed parallel design are proposed and implemented on a Xilinx Virtex-7 FPGA, targeting the available DSP slices, which offer high-speed multiplication and accumulation. Both use the Comba multiplication scheduling method to manage the large multiplications required with uneven sized multiplicands and to minimise the number of read and write operations to RAM. Results show that speed up factors of 3.6 and 10.4 can be achieved for the encryption step with medium-sized security parameters for the low-area and parallel designs respectively, compared to the benchmark software implementation on an Intel Core2 Duo E8400 platform running at 3 GHz.

Aerodynamic optimization using Adjoint methods and parametric CAD models

This paper describes an implementation of a method capable of integrating parametric, feature based, CAD models based on commercial software (CATIA) with the SU2 software framework. To exploit the adjoint based methods for aerodynamic optimisation within the SU2, a formulation to obtain geometric sensitivities directly from the commercial CAD parameterisation is introduced, enabling the calculation of gradients with respect to CAD based design variables. To assess the accuracy and efficiency of the alternative approach, two aerodynamic optimisation problems are investigated: an inviscid, 3D, problem with multiple constraints, and a 2D high-lift aerofoil, viscous problem without any constraints. Initial results show the new parameterisation obtaining reliable optimums, with similar levels of performance of the software native parameterisations. In the final paper, details of computing CAD sensitivities will be provided, including accuracy as well as linking geometric sensitivities to aerodynamic objective functions and constraints; the impact in the robustness of the overall method will be assessed and alternative parameterisations will be included.

An innovative electroforming process for oil heated rotational moulding tools

Rotational moulding is a method to produce hollow plastic articles. Heating is normally carried out by placing the mould into a hot air oven where the plastic material in the mould is heated. The most common cooling media are water and forced air. Due to the inefficient nature of conventional hot air ovens most of the energy supplied by the oven does not go to heat the plastic and as a consequence the procedure has very long cycle times. Direct oil heating is an effective alternative in order to achieve better energy efficiency and cycle times. This research work has combined this technology with new innovative design of mould, applying the advantages of electroforming and rapid prototyping. Complex cavity geometries are manufactured by electroforming from a rapid prototyping mandrel. The approach involves conformal heating and cooling channels , where the oil flows into a parallel channel to the electroformed cavity (nickel or copper). Because of this the mould enables high temperature uniformity with direct heating and cooling of the electroformed shell, Uniform heating and cooling is important not only for good quality parts but also for good uniform wall thickness distribution in the rotationally moulded part. The experimental work with the manufactured prototype mould has enabled analysis of the thermal uniformity in the cavity, under different temperatures. Copyright © 2008 by ASME.

Semi-formal Models to Support Program Development: Autonomic Management within Component Based Parallel and Distributed Programming

Functional and non-functional concerns require different programming effort, different techniques and different methodologies when attempting to program efficient parallel/distributed applications. In this work we present a "programmer oriented" methodology based on formal tools that permits reasoning about parallel/distributed program development and refinement. The proposed methodology is semi-formal in that it does not require the exploitation of highly formal tools and techniques, while providing a palatable and effective support to programmers developing parallel/distributed applications, in particular when handling non-functional concerns.

Synthesizable FFT cores

Methods are presented for developing synthesizable FFT cores. These are based on a modular approach in which parameterizable blocks are cascaded to implement the computations required across a range of typical FFT signal flow graphs. The underlying architectural approach combines the use of a digital serial data organization with generic commutator blocks to produce systems that offer 100% processor utilization with storage requirements less than previous designs. The approach has been used to create generators for the automated synthesis of FFT cores that are portable across a broad range of silicon technologies. Resulting chip designs are competitive with manual methods but with significant reductions in design times.

Pleistocene and Holocene glacier fluctuations upon the Kamchatka Peninsula

This review summarises landform records and published age-estimates (largely based upon tephrochronology) to provide an overview of glacier fluctuations upon the Kamchatka Peninsula during the Holocene and, to a lesser degree, earlier phases of glaciation. The evidence suggests that following deglaciation from the Last Glacial Maximum (LGM), the peninsula experienced numerous phases of small-scale glacial advance. During the Late Glacial, moraine sequences appear to reflect the former presence of extensive glaciers in some parts of the peninsula, though little chronological control is available for deposits of this period. During the Holocene, the earliest and most extensive phase of advance likely occurred sometime prior to c. 6.8 ka, when glaciers extended up to 8 km beyond their current margins. However, these deposits lack maximum age constrains, and pre-Holocene ages cannot be discounted. Between c. 6.8 ka and the onset of ‘Neoglaciation’ c. 4.5 ka, there is little evidence of glacial advance upon the peninsula, and this period likely coincides with the Holocene climatic optimum (or ‘hypsithermal’). Since c. 4.5 ka, numerous moraines have been deposited, likely reflecting a series of progressively less extensive phases of ice advance during the Late Holocene. The final stage of notable ice advance occurred during the Little Ice Age (LIA), between c. 1350 and 1850 C.E., when reduced summer insolation in the Northern Hemisphere likely coincided with solar activity minima and several strong tropical volcanic eruptions to induce widespread cooling. Following the LIA, glaciers upon the peninsula have generally shown a pattern of retreat, with accelerated mass loss in recent decades. However, a number of prominent climatically and non-climatically controlled glacial advances have also occurred during this period. In general, there is evidence to suggest that millennial scale patterns in the extent and timing of glaciation upon the peninsula (encompassing much of the last glacial period) are governed by the extent of ice sheets in North America. Millennial-to-centennial scale fluctuations of Kamchatkan glaciers (encompassing much of the Holocene) are governed by the location and relative intensity of the Aleutian Low and Siberian High pressure systems. Decadal scale variations in glacier extent and mass balance (particularly since the LIA) are governed by inter-decadal climatic variability over the North Pacific (as reflected by the Pacific Decadal Oscillation), alongside a broader trend of hemispheric warming.