A Capabilities-Aware Framework for Using Computational Accelerators in Data-Intensive Computing

Multicore computational accelerators such as GPUs are now commodity components for highperformance computing at scale. While such accelerators have been studied in some detail as stand-alone computational engines, their integration in large-scale distributed systems raises new challenges and trade-offs. In this paper, we present an exploration of resource management alternatives for building asymmetric accelerator-based distributed systems. We present these alternatives in the context of a capabilities-aware framework for data-intensive computing, which uses an enhanced implementation of the MapReduce programming model for accelerator-based clusters, compared to the state of the art. The framework can transparently utilize heterogeneous accelerators for deriving high performance with low programming effort. Our work is the first to compare heterogeneous types of accelerators, GPUs and a Cell processors, in the same environment and the first to explore the trade-offs between compute-efficient and control-efficient accelerators on data-intensive systems. Our investigation shows that our framework scales well with the number of different compute nodes. Furthermore, it runs simultaneously on two different types of accelerators, successfully adapts to the resource capabilities, and performs 26.9% better on average than a static execution approach.

FPGA based Soft-core SIMD Processing: A MIMO-OFDM Fixed-Complexity Sphere Decoder Case Study

To enable reliable data transfer in next generation Multiple-Input Multiple-Output (MIMO) communication systems, terminals must be able to react to fluctuating channel conditions by having flexible modulation schemes and antenna configurations. This creates a challenging real-time implementation problem: to provide the high performance required of cutting edge MIMO standards, such as 802.11n, with the flexibility for this behavioural variability. FPGA softcore processors offer a solution to this problem, and in this paper we show how heterogeneous SISD/SIMD/MIMD architectures can enable programmable multicore architectures on FPGA with similar performance and cost as traditional dedicated circuit-based architectures. When applied to a 4×4 16-QAM Fixed-Complexity Sphere Decoder (FSD) detector we present the first soft-processor based solution for real-time 802.11n MIMO.

Shortening design time through multiplatform simulations with a portable OpenCL golden-model: the LDPC decoder case

Hardware designers and engineers typically need to explore a multi-parametric design space in order to find the best configuration for their designs using simulations that can take weeks to months to complete. For example, designers of special purpose chips need to explore parameters such as the optimal bitwidth and data representation. This is the case for the development of complex algorithms such as Low-Density Parity-Check (LDPC) decoders used in modern communication systems. Currently, high-performance computing offers a wide set of acceleration options, that range from multicore CPUs to graphics processing units (GPUs) and FPGAs. Depending on the simulation requirements, the ideal architecture to use can vary. In this paper we propose a new design flow based on OpenCL, a unified multiplatform programming model, which accelerates LDPC decoding simulations, thereby significantly reducing architectural exploration and design time. OpenCL-based parallel kernels are used without modifications or code tuning on multicore CPUs, GPUs and FPGAs. We use SOpenCL (Silicon to OpenCL), a tool that automatically converts OpenCL kernels to RTL for mapping the simulations into FPGAs. To the best of our knowledge, this is the first time that a single, unmodified OpenCL code is used to target those three different platforms. We show that, depending on the design parameters to be explored in the simulation, on the dimension and phase of the design, the GPU or the FPGA may suit different purposes more conveniently, providing different acceleration factors. For example, although simulations can typically execute more than 3x faster on FPGAs than on GPUs, the overhead of circuit synthesis often outweighs the benefits of FPGA-accelerated execution.

On the Exploitation of the Inherent Error Resilience of Wireless Systems under Unreliable Silicon

In this paper, we investigate the impact of circuit misbehavior due to parametric variations and voltage scaling on the performance of wireless communication systems. Our study reveals the inherent error resilience of such systems and argues that sufficiently reliable operation can be maintained even in the presence of unreliable circuits and manufacturing defects. We further show how selective application of more robust circuit design techniques is sufficient to deal with high defect rates at low overhead and improve energy efficiency with negligible system performance degradation.

Propagation modelling and measurements in a populated indoor environment at 5.2 GHz

Human occupants within indoor environments are not always stationary and their movement will lead to temporal channel variations that strongly affect the quality of indoor wireless communication systems. This paper describes a statistical channel characterization, based on experimental measurements, of human body effects on line-of-sight indoor narrowband propagation at 5.2 GHz. The analysis shows that, as the number of pedestrians within the measurement location increases, the Ricean K-factor that best fits the empirical data tends to decrease proportionally, ranging from K=7 with 1 pedestrian to K=0 with 4 pedestrians. Level crossing rate results were Rice distributed, while average fade duration results were significantly higher than theoretically computed Rice and Rayleigh, due to the fades caused by pedestrians. A novel CDF that accurately characterizes the 5.2 GHz channel in the considered indoor environment is proposed. For the first time, the received envelope CDF is explicitly described in terms of a quantitative measurement of pedestrian traffic within the indoor environment.

Urothelial cancer gene regulatory networks inferred from large-scale RNAseq, Bead and Oligo gene expression data

BACKGROUND: Urothelial pathogenesis is a complex process driven by an underlying network of interconnected genes. The identification of novel genomic target regions and gene targets that drive urothelial carcinogenesis is crucial in order to improve our current limited understanding of urothelial cancer (UC) on the molecular level. The inference of genome-wide gene regulatory networks (GRN) from large-scale gene expression data provides a promising approach for a detailed investigation of the underlying network structure associated to urothelial carcinogenesis.

METHODS: In our study we inferred and compared three GRNs by the application of the BC3Net inference algorithm to large-scale transitional cell carcinoma gene expression data sets from Illumina RNAseq (179 samples), Illumina Bead arrays (165 samples) and Affymetrix Oligo microarrays (188 samples). We investigated the structural and functional properties of GRNs for the identification of molecular targets associated to urothelial cancer.

RESULTS: We found that the urothelial cancer (UC) GRNs show a significant enrichment of subnetworks that are associated with known cancer hallmarks including cell cycle, immune response, signaling, differentiation and translation. Interestingly, the most prominent subnetworks of co-located genes were found on chromosome regions 5q31.3 (RNAseq), 8q24.3 (Oligo) and 1q23.3 (Bead), which all represent known genomic regions frequently deregulated or aberated in urothelial cancer and other cancer types. Furthermore, the identified hub genes of the individual GRNs, e.g., HID1/DMC1 (tumor development), RNF17/TDRD4 (cancer antigen) and CYP4A11 (angiogenesis/ metastasis) are known cancer associated markers. The GRNs were highly dataset specific on the interaction level between individual genes, but showed large similarities on the biological function level represented by subnetworks. Remarkably, the RNAseq UC GRN showed twice the proportion of significant functional subnetworks. Based on our analysis of inferential and experimental networks the Bead UC GRN showed the lowest performance compared to the RNAseq and Oligo UC GRNs.

CONCLUSION: To our knowledge, this is the first study investigating genome-scale UC GRNs. RNAseq based gene expression data is the data platform of choice for a GRN inference. Our study offers new avenues for the identification of novel putative diagnostic targets for subsequent studies in bladder tumors.

Impact of Residual Transmit RF Impairments on Training-Based MIMO Systems

Radio-frequency (RF) impairments, which intimately exist in wireless communication systems, can severely limit the performance of multiple-input-multiple-output (MIMO) systems. Although we can resort to compensation schemes to mitigate some of these impairments, a certain amount of residual impairments always persists. In this paper, we consider a training-based point-to-point MIMO system with residual transmit RF impairments (RTRI) using spatial multiplexing transmission. Specifically, we derive a new linear channel estimator for the proposed model, and show that RTRI create an estimation error floor in the high signal-to-noise ratio (SNR) regime. Moreover, we derive closed-form expressions for the signal-to-noise-plus-interference ratio (SINR) distributions, along with analytical expressions for the ergodic achievable rates of zero-forcing, maximum ratio combining, and minimum mean-squared error receivers, respectively. In addition, we optimize the ergodic achievable rates with respect to the training sequence length and demonstrate that finite dimensional systems with RTRI generally require more training at high SNRs than those with ideal hardware. Finally, we extend our analysis to large-scale MIMO configurations, and derive deterministic equivalents of the ergodic achievable rates. It is shown that, by deploying large receive antenna arrays, the extra training requirements due to RTRI can be eliminated. In fact, with a sufficiently large number of receive antennas, systems with RTRI may even need less training than systems with ideal hardware.

A Novel Approach for Axle Detection in Bridge Weigh-In-Motion Systems

Bridge weigh-in-motion (B-WIM), a system that uses strain sensors to calculate the weights of trucks passing on bridges overhead, requires accurate axle location and speed information for effective performance. The success of a B-WIM system is dependent upon the accuracy of the axle detection method. It is widely recognised that any form of axle detector on the road surface is not ideal for B-WIM applications as it can cause disruption to the traffic (Ojio & Yamada 2002; Zhao et al. 2005; Chatterjee et al. 2006). Sensors under the bridge, that is Nothing-on-Road (NOR) B-WIM, can perform axle detection via data acquisition systems which can detect a peak in strain as the axle passes. The method is often successful, although not all bridges are suitable for NOR B-WIM due to limitations of the system. Significant research has been carried out to further develop the method and the NOR algorithms, but beam-and-slab bridges with deep beams still present a challenge. With these bridges, the slabs are used for axle detection, but peaks in the slab strains are sensitive to the transverse position of wheels on the beam. This next generation B-WIM research project extends the current B-WIM algorithm to the problem of axle detection and safety, thus overcoming the existing limitations in current state-of–the-art technology. Finite Element Analysis was used to determine the critical locations for axle detecting sensors and the findings were then tested in the field. In this paper, alternative strategies for axle detection were determined using Finite Element analysis and the findings were then tested in the field. The site selected for testing was in Loughbrickland, Northern Ireland, along the A1 corridor connecting the two cities of Belfast and Dublin. The structure is on a central route through the island of Ireland and has a high traffic volume which made it an optimum location for the study. Another huge benefit of the chosen location was its close proximity to a nearby self-operated weigh station. To determine the accuracy of the proposed B-WIM system and develop a knowledge base of the traffic load on the structure, a pavement WIM system was also installed on the northbound lane on the approach to the structure. The bridge structure selected for this B-WIM research comprised of 27 pre-cast prestressed concrete Y4-beams, and a cast in-situ concrete deck. The structure, a newly constructed integral bridge, spans 19 m and has an angle of skew of 22.7°.

Modeling, Analysis and Performance Comparison of Two Direct Sampling DCSK Receivers under Frequency Nonselective Fading Channels

Two direct sampling correlator-type receivers for differential chaos shift keying (DCSK) communication systems under frequency non-selective fading channels are proposed. These receivers operate based on the same hardware platform with different architectures. In the first scheme, namely sum-delay-sum (SDS) receiver, the sum of all samples in a chip period is correlated with its delayed version. The correlation value obtained in each bit period is then compared with a fixed threshold to decide the binary value of recovered bit at the output. On the other hand, the second scheme, namely delay-sum-sum (DSS) receiver, calculates the correlation value of all samples with its delayed version in a chip period. The sum of correlation values in each bit period is then compared with the threshold to recover the data. The conventional DCSK transmitter, frequency non-selective Rayleigh fading channel, and two proposed receivers are mathematically modelled in discrete-time domain. The authors evaluated the bit error rate performance of the receivers by means of both theoretical analysis and numerical simulation. The performance comparison shows that the two proposed receivers can perform well under the studied channel, where the performances get better when the number of paths increases and the DSS receiver outperforms the SDS one.

Energy efficiency optimization in hardware-constrained large-scale MIMO systems

Large-scale multiple-input multiple-output (MIMO) communication systems can bring substantial improvement in spectral efficiency and/or energy efficiency, due to the excessive degrees-of-freedom and huge array gain. However, large-scale MIMO is expected to deploy lower-cost radio frequency (RF) components, which are particularly prone to hardware impairments. Unfortunately, compensation schemes are not able to remove the impact of hardware impairments completely, such that a certain amount of residual impairments always exists. In this paper, we investigate the impact of residual transmit RF impairments (RTRI) on the spectral and energy efficiency of training-based point-to-point large-scale MIMO systems, and seek to determine the optimal training length and number of antennas which maximize the energy efficiency. We derive deterministic equivalents of the signal-to-noise-and-interference ratio (SINR) with zero-forcing (ZF) receivers, as well as the corresponding spectral and energy efficiency, which are shown to be accurate even for small number of antennas. Through an iterative sequential optimization, we find that the optimal training length of systems with RTRI can be smaller compared to ideal hardware systems in the moderate SNR regime, while larger in the high SNR regime. Moreover, it is observed that RTRI can significantly decrease the optimal number of transmit and receive antennas.

Generic Architecture and Semiconductor Intellectual Property Cores for Avanced Encryption Standard Cryptography

A generic architecture for implementing the advanced encryption standard (AES) encryption algorithm in silicon is proposed. This allows the instantiation of a wide range of chip specifications, with these taking the form of semiconductor intellectual property (IP) cores. Cores implemented from this architecture can perform both encryption and decryption and support four modes of operation: (i) electronic codebook mode; (ii) output feedback mode; (iii) cipher block chaining mode; and (iv) ciphertext feedback mode. Chip designs can also be generated to cover all three AES key lengths, namely 128 bits, 192 bits and 256 bits. On-the-fly generation of the round keys required during decryption is also possible. The general, flexible and multi-functional nature of the approach described contrasts with previous designs which, to date, have been focused on specific implementations. The presented ideas are demonstrated by implementation in FPGA technology. However, the architecture and IP cores derived from this are easily migratable to other silicon technologies including ASIC and PLD and are capable of covering a wide range of modem communication systems cryptographic requirements. Moreover, the designs produced have a gate count and throughput comparable with or better than the previous one-off solutions.

Spatially Correlated Multiple-Ananna Channel Capacity Distributions

In this paper, we investigate the capacity of multiple-input multiple-output (MIMO) wireless communication systems over spatially correlated Rayleigh distributed flat fading channels with complex Gaussian additive noise. Specifically, we derive the probability density function of the mutual information between transmitted and received complex signals of MIMO systems. Using this density we derive the closed-form ergodic capacity (mean), delay-limited capacity, capacity variance and outage capacity formulas for spatially correlated channels and then evaluate these formulas numerically. Numerical results show how the channel correlation degrades the capacity of MIMO communication systems. We also show that the density of mutual information of correlated/uncorrelated MIMO systems can be approximated by a Gaussian density with derived mean and variance, even for a finite number of inputs and outputs.

Compact quadrifilar helix antenna

Introduction: The quadrifilar helix antenna (QHA) is used widely for terrestrial [1] and space communication systems [2], where it is necessary to generate a circularly polarised cardioid-shaped radiation pattern with a high front-to-back ratio and low cross-polarisation. The radiating structure comprises four helical conductors which are excited in phase quadrature at the feed point, which is usually located at the centre of the top radials. The physical size of the quadrifilar antenna can be reduced by dielectric loading [3] or by meandering the printed linear elements [4]. However, in the former arrangement dielectric absorption reduces the radiation efficiency of the antenna, and the latter technique is not suitable for constructing free standing wire structures, which are normally used for spacecraft payloads in the VHF and UHF bands [2]. This Letter shows that a significant reduction in the axial length of a 1/2 turn half-wavelength QHA can be achieved by modifying the geometry of the helices in the region around the midpoint where a current null exists. Simulated and experimental results at L band are used to show that a size reduction of up to 15% is possible without significantly degrading the pattern shape and the bandwidth.

2.4 GHz Class-E power amplifier with transmissionline harmonic terminations

The design procedure, fabrication and measurement of a Class-E power amplifier with excellent second- and third-harmonic suppression levels are presented. A simplified design technique offering compact physical layout is proposed. With a 1.2 mm gate-width GaAs MESFET as a switching device, the amplifier is capable of delivering 19.2 dBm output power at 2.41 GHz, achieves peak PAE of 60% and drain efficiency of 69%, and exhibits 9 dB power gain when operated from a 3 V DC supply voltage. When compared to the classical Class-E two-harmonic termination amplifier, the Class-E amplifier employing three-harmonic terminations has more than 10% higher drain efficiency and 23 dB better third-harmonic suppression level. Experimental results are presented and good agreement with simulation is obtained. Further, to verify the practical implementation in communication systems, the Bluetooth-standard GFSK modulated signal is applied to both two- and three-harmonic amplifiers. The measured RMS FSK deviation error and RMS magnitude error were, for the three-harmonic case, 1.01 kHz and 0.122%, respectively, and, for the two-harmonic case, 1.09 kHz and 0.133%. © 2007 The Institution of Engineering and Technology.