ADVANCED ISLANDING DETECTION METHODS FOR SINGLE PHASE GRID CONNECTED PV INVERTERS

Due to the growing concerns associated with fossil fuels, emphasis has been placed on clean and sustainable energy generation. This has resulted in the increase in Photovoltaics (PV) units being integrated into the utility system. The integration of PV units has raised some concerns for utility power systems, including the consequences of failing to detect islanding. Numerous methods for islanding detection have been introduced in literature. They can be categorized into local methods and remote methods. The local methods are categorically divided into passive and active methods. Active methods generally have smaller Non-Detection Zone (NDZ) but the injecting disturbances will slightly degrade the power quality and reliability of the power system. Slip Mode Frequency Shift Islanding Detection Method (SMS IDM) is an active method that uses positive feedback for islanding detection. In this method, the phase angle of the converter is controlled to have a sinusoidal function of the deviation of the Point of Common Coupling (PCC) voltage frequency from the nominal grid frequency. This method has a non-detection zone which means it fails to detect islanding for specific local load conditions. If the SMS IDM employs a different function other than the sinusoidal function for drifting the phase angle of the inverter, its non-detection zone could be smaller. In addition, Advanced Slip Mode Frequency Shift Islanding Detection Method (Advanced SMS IDM), which has been introduced in this thesis, eliminates the non-detection zone of the SMS IDM. In this method the parameters of SMS IDM change based on the local load impedance value. Moreover, the stability of the system is investigated by developing the dynamical equations of the system for two operation modes; grid connected and islanded mode. It is mathematically proven that for some loading conditions the nominal frequency is an unstable point and the operation frequency slides to another stable point, while for other loading conditions the nominal frequency is the only stable point of the system upon islanding occurring. Simulation and experimental results show the accuracy of the proposed methods in detection of islanding and verify the validity of the mathematical analysis.

Method to Improve the Linearity of Active Commutating Mixers Using Dynamic Current Injection

A double balanced (DBM) CMOS mixer providing high linearity is presented in this paper. A cross-coupled pair used in the IF stage of the mixer to dynamically inject current into the to mixer provide a high linearity. The proposed DBM was fabricated using a standard 130-nm CMOS process and was tested on-wafer. The double balanced mixer delivers 10 dB conversion gain, 9.5 dBm IIP3, and input P1dB of -2.4 dBm. RF bandwidth of the proposed mixer is 6 GHz, covering 0.5 GHz to 6.5 GHz with IF bandwidth of 300 MHz. RF to IF and LO to IF isolation are also better than 59 dB in the whole frequency band. The circuit uses an area of 0.015 mm2 excluding bonding pads and draw 4.5mW from a 1.2V supply.

A Decade-Bandwidth Low-Noise Mixer RFIC with a Distortion-Canceling Output Amplifier

This paper presents a 1-10 GHz low-noise downconvert mixer RFIC suitable for wideband receivers. A switched transconductor mixing core is adopted to reduce noise at high frequencies. By adding a series inductor to the RF transconductor, a flat 4-5 dB noise figure (NF) and a high gain of 26.5 dB can be achieved over a broad bandwidth out to 10 GHz. A CMOS output amplifier is also integrated on-chip, employing derivative superposition (DS) for high linearity and an OIP3 of 16.5 dBm. The circuit consumes less than 20 mW of dc power and occupies an active chip area of less than 0.2 mm2.

Variable 360° Vector-Sum Phase Shifter With Coarse and Fine Vector Scaling

A CMOS vector-sum phase shifter covering the full 360° range is presented in this paper. Broadband operational transconductance amplifiers with variable transconductance provide coarse scaling of the quadrature vector amplitudes. Fine scaling of the amplitudes is accomplished using a passive resistive network. Expressions are derived to predict the maximum bit resolution of the phase shifter from the scaling factor of the coarse and fine vector-scaling stages. The phase shifter was designed and fabricated using the standard 130-nm CMOS process and was tested on-wafer over the frequency range of 4.9–5.9 GHz. The phase shifter delivers root mean square (rms) phase and amplitude errors of 1.25° and 0.7 dB, respectively, at the midband frequency of 5.4 GHz. The input and output return losses are both below 17 dB over the band, and the insertion loss is better than 4 dB over the band. The circuit uses an area of 0.303 mm2 excluding bonding pads and draws 28 mW from a 1.2 V supply.